Circuit breaker with solid-state trip unit with sampling and latching at the last signal peak

Claim 1

A digital solid-state trip-unit for an electrical circuit-breaker comprising: current sensor means for generating analog current signals proportional to respective currents flowing through conductors protected by said circuit-breaker; rectifier means for rectifying said current signals and for producing an analog signal representative of an instantaneous maximum value of said currents; analog-to-digital converter means connected to said rectifier means for sampling said analog signal at a sampling period and for converting said analog signal to a sampled digitized signal; microprocessor-based digital processing means connected to said analog-to-digital converter means including: means for comparing, once during each processing cycle of said processing means, said sampled digitized signal with a latched peak value stored in said processing means, means for replacing said stored value by said sample digitized signal and for setting a stored countdown period to a predetermined maximum value which is greater than one period of the analog current signals, if said means for comparing determine that said sampled digitized signal is greater than said stored latched peak value, means for decrementing the stored countdown period if the countdown period is not equal to zero and if said means for comparing determines that said sampled digitized signal is less than said stored latched peak value, means for erasing the stored latched peak value if the stored countdown period is equal to zero and if said means for comparing determines that said sampled digitized signal is less than said stored latched peak value, and means for providing a circuit-breaker tripping order after a long time delay or after a short time delay, when said stored latch peak value exceeds respective predetermined levels; and circuit-breaker trip means activated by said tripping order.