US4707620A
Expired / Lapsed
US
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Adjustable impedance driver network
Assignee: Credence Systems Corp
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Filing: 1986-07-22
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Granted: 1987-11-17
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Expires: 2006-07-22
Abstract
Abstract A variable impedance driver network comprises a plurality of transmission gates connected in parallel between a voltage source and an output. Each transmission gate has a predetermined nominal impedance and by turning on selective gates the overall impedance of the network may be adjusted to match that required at the output.
Inventors
- 👤 Steven K. Sullivan
- 👤 Christopher W. Branson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 17:55
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/687; H03K17/693; H03K19/00; H03K19/0005
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
109 words
A driver circuit having a high voltage output state and a low voltage output state and having a variable output impedance comprising: (a) a first plurality of transmission gates connected in parallel between a high voltage source and a transmission line; (b) a second plurality of transmission gates connected between a low voltage source and said transmission line; and (c) logic circuit means for simultaneously selectively enabling various ones of said gates when either a high level or low level actuating signal is provided to one of said respective pluralities of transmission gates, thereby adjusting the impedance between said high or low voltage source, respectively, and said transmission line.
Claim 2
Dependent Claim
109 words
A driver circuit having a high voltage output state and a low voltage output state and having a variable output impedance comprising: (a) a first plurality of transmission gates connected in parallel between a high voltage source and a transmission line; (b) a second plurality of transmission gates connected between a low voltage source and said transmission line; and (c) logic circuit means for simultaneously selectively enabling various ones of said gates when either a high level or low level actuating signal is provided to one of said respective pluralities of transmission gates, thereby adjusting the impedance between said high or low voltage source, respectively, and said transmission line.
Claim 3
Dependent Claim
20 words
The driver circuit of claim 1 wherein each transmission gate in each of said pluralities has a predetermined nominal impedance.
Claim 4
Dependent Claim
32 words
The driver circuit of claim 2 wherein in each of said pluralities of transmission gates, the individual transmission gates have nominal impedances of R, 2R, . . . 2 n R, respectively.
Claim 5
Dependent Claim
15 words
The driver circuit of claim 3 wherein the transmission gates are CMOS field effect transistors.
Claim 6
Dependent Claim
111 words
An adjustable impedance driver network for coupling a voltage source to an output, comprising: (a) a plurality of CMOS transmission gates, each gate in said plurality having a predetermined nominal impedance when turned on, and a substantially infinite impedance when turned off, connected in parallel between said voltage source and said output; (b) a voltage source coupled to each of said CMOS transmission gates; and (c) logic circuit means coupled to a control electrode of each of said transmission gates and responsive to both an actuating signal and a predetermined digital code, for selectively turning on various ones of said gates simultaneously to provide a variable impedance for said voltage source.
Claim 7
Dependent Claim
111 words
An adjustable impedance driver network for coupling a voltage source to an output, comprising: (a) a plurality of CMOS transmission gates, each gate in said plurality having a predetermined nominal impedance when turned on, and a substantially infinite impedance when turned off, connected in parallel between said voltage source and said output; (b) a voltage source coupled to each of said CMOS transmission gates; and (c) logic circuit means coupled to a control electrode of each of said transmission gates and responsive to both an actuating signal and a predetermined digital code, for selectively turning on various ones of said gates simultaneously to provide a variable impedance for said voltage source.
Claim 8
Dependent Claim
47 words
The adjustable impedance driver of claim 5 wherein said logic circuit means comprises an AND gate array, each AND gate in said array having an output connected to each respective control electrode and having respective inputs comprising said actuating signal and one bit of said digital code.
Claim 9
Dependent Claim
25 words
The adjustable impedance driver network of claim 6 wherein the nominal impedances of said gates are R, 2R, . . . 2 n R, respectively.
References Cited (Backward Citations)
US3646329A
Cited
US4329600A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1990-11-16 | 1991-05-18 | 1991-11-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-11-16 | 1995-05-18 | 1995-11-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-11-16 | 1999-05-18 | 1999-11-17 | $7700.00 | Window Closed / Lapsed |