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US4704679A Expired / Lapsed US ⏱️ 0.0 years remaining

Addressing environment storage for accessing a stack-oriented memory

Assignee: Unisys Corp
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Filing: 1985-06-11
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Granted: 1987-11-03
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Expires: 2005-06-11
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Abstract

Abstract An address environment storage unit for a stack-oriented data processor for operating in data sets arranged as structured blocks, or nested pushdown stacks. The address environment storage employs a plurality of sets of display registers such that the current set of display registers does not have to be updated each time the processor moves to a different area of data in memory. The programmer only needs to provide a designation of a lexical level in a particular stack and the offset value from the base of the particular activation record in that stack for addition to obtain actual memory address. When the processor executes a procedure enter operator that calls for a new section of memory in which to operate, a display pointer is changed to point to the set of display registers provided for accessing that new area of memory.

Inventors

  • 👤 Joseph A. Hassler
  • 👤 Gregory K. Deal

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 23:42
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/44; G06F9/448; G06F9/4482; G06F9/4484; G06F9/4486

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 187 words
A memory enviroment unit coupled to a memory for forming absolute memory addresses to access data items arranged in said memory as a series of records, which data items are specified by an address couple consisting of a record indication and an offset value representing the displacement of the data item form the base memory location of that record, said unit comprising: a plurality of sets of record base address registers, each register containing an address of a record base memory location, each set of record has address registers representing a particular memory adress enviroment; a pointer register coupled to each of said registers and containing a value indicating a particular set in the memory adress enviroment to be currently adressed, said value representing part of an address to a record base address register, said record indication serving to complete said an address of said a record base register; and an input register to receive saod address couple, said input register being coupled to said registers to supply said record indication as the remaining part of said an address to one of said record base address registers.
Claim 2
Dependent Claim 187 words
A memory enviroment unit coupled to a memory for forming absolute memory addresses to access data items arranged in said memory as a series of records, which data items are specified by an address couple consisting of a record indication and an offset value representing the displacement of the data item form the base memory location of that record, said unit comprising: a plurality of sets of record base address registers, each register containing an address of a record base memory location, each set of record has address registers representing a particular memory adress enviroment; a pointer register coupled to each of said registers and containing a value indicating a particular set in the memory adress enviroment to be currently adressed, said value representing part of an address to a record base address register, said record indication serving to complete said an address of said a record base register; and an input register to receive saod address couple, said input register being coupled to said registers to supply said record indication as the remaining part of said an address to one of said record base address registers.
Claim 3
Dependent Claim 46 words
A memory address enviroment unit according to claim 1 further including: adder means coupled to each of said record base address registers and to said input register to respectively receive a record base address and a displacement value for addition to create an absolute memory address.
Claim 4
Dependent Claim 42 words
A memory address environment unit according to claim 2 further including: an adder output register coupled to said adder means to receive said absolute memory address, said adder output register being coupled to said memory to access the particular addressed data item.
Claim 5
Dependent Claim 52 words
A memory address environment unit according to claim 3 further including: data cache means, to store previously fetched data items from said memory, said data cache means being coupled to said adder output register to receive said absolute memory address should the particular addressed data item be in said data cache means.
Claim 6
Dependent Claim 40 words
A memory address enviroment unit according to claim 1 wherein: said pointer register is a counter register to be incremented and decremented, its current value serving as a part of an address to one of said record base address registers.
Claim 7
Dependent Claim 30 words
A memory address enviroment unit according to claim 5 further including: an operator decorder coupled to said pointer register to increment or decrement its value in response to an operator.

References Cited (Backward Citations)

US3461434A Cited
US3546677A Cited
US3548384A Cited
US3737871A Cited
US3868644A Cited
US3889243A Cited
US4268903A Cited
US4366536A Cited
US4517640A Cited
US4471431A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-11-02 1991-05-04 1991-11-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-11-02 1995-05-04 1995-11-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-11-02 1999-05-04 1999-11-03 $7700.00 Window Closed / Lapsed

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