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US4703354A
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Non-linear sync signal processing circuit
Assignee: Zenith Electronics LLC
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Filing: 1984-05-16
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Granted: 1987-10-27
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Expires: 2004-05-16
Abstract
Abstract A non-linear sync signal processor for deriving a sync-like signal from video information with suppressed sync signals includes a differentiating circuit for deriving pulse potentials from the leading and trailing edges of suppressed sync signals, a pair of comparators for generating signals corresponding to the pulse potentials and a pair of non-retriggerable monostable timers, one for creating a 6 microsecond first window in response to a leading edge and the other for creating a 58 microsecond second window in response to a trailing edge occurring in the first window. The second timer is enabled by operation of the first timer and the first timer is inhibited during operation of the second timer. Thus only sync-like signals having three characteristics of conventional sync signals are regenerated.
Inventors
- 👤 Frederick H. Auld, Jr.
- 👤 David L. Walker
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 15:35
CPC Classifications
H; H04; H04N; H04N7/00; H04N7/16; H04N7/167; H04N7/171; H04N7/1713
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
71 words
A sync signal processing circuit for use in a television system with a video signal including sync signals, each having first, second and third characteristics, comprising: means for detecting said first characteristic in sync signals in said video signal; means for detecting said second characteristic in sync signals in said video signal; and means for processing successive sync signals having said detected characteristics to determine if said third characteristic is correct.
Claim 2
Dependent Claim
71 words
A sync signal processing circuit for use in a television system with a video signal including sync signals, each having first, second and third characteristics, comprising: means for detecting said first characteristic in sync signals in said video signal; means for detecting said second characteristic in sync signals in said video signal; and means for processing successive sync signals having said detected characteristics to determine if said third characteristic is correct.
Claim 3
Dependent Claim
49 words
The circuit of claim 1, wherein said first characteristic is the leading edge polarity of sync pulses, said second characteristic is the trailing edge polarity of said sync pulses occurring within a predetermined time of said leading edges, and said third characteristic is the time between successive sync pulses.
Claim 4
Dependent Claim
50 words
The circuit of claim 2, including first window means for creating a first window in response to sync signals having said detected first characteristic; and second window means creating a second window in response to sync signals having said detected second characteristic to determine if said third characteristic is correct.
Claim 5
Dependent Claim
35 words
The circuit of claim 3, wherein said first and said second window means include a first and a second timer, and further including a differentiating circuit coupled to said first and said second window means.
Claim 6
Dependent Claim
39 words
The circuit of claim 4, wherein said first timer is activated by sync signals having said detected first characteristic and said second timer is activated by sync signals having said detected second characteristic and occurring during said first window.
Claim 7
Dependent Claim
114 words
A non-linear sync processor for a television signal including suppressed sync signals comprising: differentiation means for detecting leading and trailing edges of said suppressed sync signals; first window means including a first timer activated by a first of said leading edges for establishing a period slightly in excess of the time between said leading and trailing edges; second window means, including a second timer activated by a first of said trailing edges occurring during said first window for establishing a second window of a duration slightly less than the time interval between successive sync signals; and means interconnecting said second timer and said first timer to inhibit said first timer during said second window.
Claim 8
Dependent Claim
114 words
A non-linear sync processor for a television signal including suppressed sync signals comprising: differentiation means for detecting leading and trailing edges of said suppressed sync signals; first window means including a first timer activated by a first of said leading edges for establishing a period slightly in excess of the time between said leading and trailing edges; second window means, including a second timer activated by a first of said trailing edges occurring during said first window for establishing a second window of a duration slightly less than the time interval between successive sync signals; and means interconnecting said second timer and said first timer to inhibit said first timer during said second window.
Claim 9
Dependent Claim
25 words
The processor of claim 6 wherein said first timer has a duration of 6 microseconds and said second timer has a duration of 58 microseconds.
Claim 10
Dependent Claim
16 words
The processor of claim 6 wherein said first and said second timers are non-retriggerable monostable circuits.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-10-26 | 1991-04-27 | 1991-10-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-10-26 | 1995-04-27 | 1995-10-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-10-26 | 1999-04-27 | 1999-10-27 | $7700.00 | Window Closed / Lapsed |