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US4695745A Expired / Lapsed US ⏱️ 0.0 years remaining

Monolithic semiconductor integrated circuit with programmable elements for minimizing deviation of threshold value

Assignee: Sharp Corp
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Filing: 1984-12-14
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Granted: 1987-09-22
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Expires: 2004-12-14
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Abstract

Abstract An integrated circuit includes a plurality of threshold-value compensatory programmable elements integrally incorporated into a semiconductor integrated circuit, wherein, during the inspection process after assembly, the programmable elements store stationary data related to varied threshold voltages occurred during assembly process so that the varied substrate bias voltages can be restored to an ideal level by applying compensations as required. This circuit is extremely advantageous in that it effectively compensates for even the slightest variation of the threshold voltage in the integrated circuit using its extremely simplified circuit configuration, and in light of the conventional tendency in which redundant circuits containing a variety of chip parts each having a substantial area are used, against the needs for high-density part installation, the circuit embodied by the present invention effectively and securely provides means for realizing higher yield of monolithic semiconductor integrated circuits.

Inventors

  • 👤 Toshio Mimoto
  • 👤 Keizo Sakiyama

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 17:56
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/205

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 75 words
A monolithic semiconductor integrated circuit comprising: a substrate bias voltage generator circuit including, an oscillator circuit and a charge pump circuit; MOS transistor means connecting said oscillator circuit to said charge pump circuit; and a plurality of programmable elements for permanently storing data being provided in a gate voltage circuit of said MOS transistor means to vary the voltage applied to the charge pump circuit in response to the memory content of said programmable elements.
Claim 2
Dependent Claim 75 words
A monolithic semiconductor integrated circuit comprising: a substrate bias voltage generator circuit including, an oscillator circuit and a charge pump circuit; MOS transistor means connecting said oscillator circuit to said charge pump circuit; and a plurality of programmable elements for permanently storing data being provided in a gate voltage circuit of said MOS transistor means to vary the voltage applied to the charge pump circuit in response to the memory content of said programmable elements.
Claim 3
Dependent Claim 70 words
A monolithic semiconductor integrated circuit comprising: a substrate bias voltage generator circuit including, an oscillator circuit and a charge pump circuit; gate-voltage-variable MOS transistor means selectively connected to said oscillator circuit and to said charge pump circuit; and at least one programmable element being connected in said bias voltage generator circuit in such a manner to selectively connect said gate voltage variable MOS transistor means to the charge pump circuit.
Claim 4
Dependent Claim 70 words
A monolithic semiconductor integrated circuit comprising: a substrate bias voltage generator circuit including, an oscillator circuit and a charge pump circuit; gate-voltage-variable MOS transistor means selectively connected to said oscillator circuit and to said charge pump circuit; and at least one programmable element being connected in said bias voltage generator circuit in such a manner to selectively connect said gate voltage variable MOS transistor means to the charge pump circuit.
Claim 5
Dependent Claim 38 words
The monolithic semiconductor integrated circuit of claim 2, wherein said gate-voltage-variable MOS transistor means and said at least one programmable element are connected in parallel circuit branches in series with said oscillator circuit and said charge pump circuit.
Claim 6
Dependent Claim 54 words
The monolithic semiconductor integrated circuit of claim 2, wherein said charge pump circuit includes at least one MOS transistor, said gate-voltage-variable MOS transistor means is connected in series with said at least one programmable element, said series connection being connected in parallel with said at least one MOS transistor of said charge pump circuit.

References Cited (Backward Citations)

US4100437A Cited
US4229667A Cited
US4322675A Cited
US4435652A Cited
US4593203A Cited
JPS5989031A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-09-21 1991-03-23 1991-09-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-09-21 1995-03-23 1995-09-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-09-21 1999-03-23 1999-09-22 $7700.00 Window Closed / Lapsed

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