US4694256A
Expired / Lapsed
US
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Compensation circuit for pulse signals
Assignee: Fujifilm Holdings Corp
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Filing: 1985-02-07
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Granted: 1987-09-15
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Expires: 2005-02-07
Abstract
Abstract A compensation circuit for pulse signals includes a noise pulse cutting circuit and a compensation pulse generating circuit. The noise pulse cutting circuit passes a reference pulse which is produced in each predetermined reference time period but blocks any other pulses until just before the next pulse is input after the reference pulse has passed. The compensation pulse generating circuit functions such that, when no pulse is input for a period of time slightly longer than the reference time period, a compensation pulse is generated and is input to the noise pulse cutting circuit. Even when there occurs noise in pulse signals, the circuit enables production of the same number of pulses as that of the reference pulses which are originally included in the pulse signals.
Inventors
- 👤 Keiichi Kawamura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 04:11
CPC Classifications
G; G01; G01R; G01R23/00; G01R23/02; G01R23/15; H; H03; H03K; H03K5/00; H03K5/125; H03K5/1252
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
360 words
A compensation circuit for pulse signals comprising a noise-pulse cutting circuit and a compensation-pulse generating circuit coupled to an output terminal of the cutting circuit, there being a first, a second and a third monostable multivibrator, said first multivibrator being operative in a stable state and in a quasi-stable state; and wherein said cutting circuit comprises: said first multivibrator, said first multivibrator being responsive to an input pulse signal applied to said cutting circuit periodically at a predermined period for assuming the quasi-stable state in response to each pulse of the input signal, the duration of quasi-stable state being slightly shorter than said period, said first multivibrator reverting to the stable state at the conclusion of a quasi-stable state; and a gate circuit providing an output pulse of said cutting circuit at said output terminal of said cutting circuit, said gate circuit being operatively connected to an output terminal of said first multivibrator to allow passage of a pulse of said input pulse signal via said output terminal of said cutting circuit to said generating circuit during each stable state and to block passage of a pulse of said input pulse signal to said generating circuit during each quasi-stable state, thereby implementing a pulse-cutting mode of said cutting circuit for blocking a noise pulse occurring during a quasi-stable state of said first multivibrator; and wherein said generating circuit comprises: said second multivibrator, said second multivibrator assuming a quasi-stable state in response to a pulse outputted by said gate circuit for an interval of time slightly longer than said period, said second multivibrator reverting to a stable state at the conclusion of quasi-stable state; and said third multivibrator, said third multivibrator being triggered by said second multivibrator upon a transistion in said second multivibrator from a quasi-stable state to a stable state generate a compensation pulse at an output terminal of said generating circuit; and wherein said compensation circuit further comprises means for outputting: an output pulse of said cutting circuit during the presence of a pulse of said input pulse signal, and said compensation pulse of said generating circuit upon an absence of a pulse of said input pulse signal.
Claim 2
Dependent Claim
360 words
A compensation circuit for pulse signals comprising a noise-pulse cutting circuit and a compensation-pulse generating circuit coupled to an output terminal of the cutting circuit, there being a first, a second and a third monostable multivibrator, said first multivibrator being operative in a stable state and in a quasi-stable state; and wherein said cutting circuit comprises: said first multivibrator, said first multivibrator being responsive to an input pulse signal applied to said cutting circuit periodically at a predermined period for assuming the quasi-stable state in response to each pulse of the input signal, the duration of quasi-stable state being slightly shorter than said period, said first multivibrator reverting to the stable state at the conclusion of a quasi-stable state; and a gate circuit providing an output pulse of said cutting circuit at said output terminal of said cutting circuit, said gate circuit being operatively connected to an output terminal of said first multivibrator to allow passage of a pulse of said input pulse signal via said output terminal of said cutting circuit to said generating circuit during each stable state and to block passage of a pulse of said input pulse signal to said generating circuit during each quasi-stable state, thereby implementing a pulse-cutting mode of said cutting circuit for blocking a noise pulse occurring during a quasi-stable state of said first multivibrator; and wherein said generating circuit comprises: said second multivibrator, said second multivibrator assuming a quasi-stable state in response to a pulse outputted by said gate circuit for an interval of time slightly longer than said period, said second multivibrator reverting to a stable state at the conclusion of quasi-stable state; and said third multivibrator, said third multivibrator being triggered by said second multivibrator upon a transistion in said second multivibrator from a quasi-stable state to a stable state generate a compensation pulse at an output terminal of said generating circuit; and wherein said compensation circuit further comprises means for outputting: an output pulse of said cutting circuit during the presence of a pulse of said input pulse signal, and said compensation pulse of said generating circuit upon an absence of a pulse of said input pulse signal.
Claim 3
Dependent Claim
29 words
A compensation circuit according to claim 1, wherein said outputting means comprises a logic OR unit connected to the output terminals of said cutting circuit and said generating circuit.
Claim 4
Dependent Claim
44 words
A compensation according to claim 1, wherein said outputting means comprises a feedback circuit connected between said output terminal of said generating circuit and an input terminal of said cutting circuit for coupling said compensation pulse to an input terminal of said first multivibrator.
Claim 5
Dependent Claim
36 words
A compensation circuit according to claim 3 wherein said feedback circuit includes an OR gate coupled to said input terminal of said first multivibrator for applying said input signal and said compensation pulse to said multivibrator.
Claim 6
Dependent Claim
113 words
A compensation circuit according to claim 3 wherein said feedback circuit includes a NAND gate coupled between said input terminal and said output terminal of said first multivibrator for applying said input signal and an output signal of said first multivibrator to the input terminal of said first multivibrator, and said gate circuit comprises and AND gate connected between an output terminal of said NAND gate and the input terminal of said first multivibrator, said AND gate having one input terminal coupled to said NAND gate, and a second input terminal coupled to the output terminal of said generating circuit for applying said input signal and said compensation pulse to said first multivibrator.
Claim 7
Dependent Claim
321 words
A compensation circuit for pulse signals comprising a noise-pulse cutting circuit and a compensation-pulse generating circuit; and wherein said cutting circuit comprises a flip-flop responsive to an input pulse signal applied to said cutting circuit periodically at a predetermined period for assuming a first logic state and a second logic state in response to successive pulses of the input signal; and wherein said generating circuit comprises a clock, a counter and a gate circuit, said counter counting clock pulses of said clock for measuring intervals of time, said gate circuit being coupled to said counter for receiving an output count of said counter, said gate circuit outputting a first pulse in response to a first predetermined value of count outputted by said counter and a second pulse in response to a second predetermined value of count outputted by said counter, said first predetermined value of count designating a time interval slightly shorter than said period, said second predetermined value of count designating a time interval slightly longer than said period; and wherein said circuit further comprises means for coupling said first pulse signal and said second pulse signal and said input signal to said flip-flop, said first pulse signal being applied to a reset terminal of said flip-flop, said coupling means applying said second pulse signal and said input signal to an input terminal of said flip-flop; and wherein said compensation circuit further comprises output means responsive to said second pulse signal and an output signal of said flip-flop for outputting an output pulse of said cutting circuit during the presence of a pulse of said input pulse signal and outputting a compensation pulse of said generating circuit upon an absence of a pulse of said input pulse signal; and said output pulse of said output means is applied to a reset terminal of said counter to restart a counting of the counter during successive periods of said input pulse signal.
Claim 8
Dependent Claim
321 words
A compensation circuit for pulse signals comprising a noise-pulse cutting circuit and a compensation-pulse generating circuit; and wherein said cutting circuit comprises a flip-flop responsive to an input pulse signal applied to said cutting circuit periodically at a predetermined period for assuming a first logic state and a second logic state in response to successive pulses of the input signal; and wherein said generating circuit comprises a clock, a counter and a gate circuit, said counter counting clock pulses of said clock for measuring intervals of time, said gate circuit being coupled to said counter for receiving an output count of said counter, said gate circuit outputting a first pulse in response to a first predetermined value of count outputted by said counter and a second pulse in response to a second predetermined value of count outputted by said counter, said first predetermined value of count designating a time interval slightly shorter than said period, said second predetermined value of count designating a time interval slightly longer than said period; and wherein said circuit further comprises means for coupling said first pulse signal and said second pulse signal and said input signal to said flip-flop, said first pulse signal being applied to a reset terminal of said flip-flop, said coupling means applying said second pulse signal and said input signal to an input terminal of said flip-flop; and wherein said compensation circuit further comprises output means responsive to said second pulse signal and an output signal of said flip-flop for outputting an output pulse of said cutting circuit during the presence of a pulse of said input pulse signal and outputting a compensation pulse of said generating circuit upon an absence of a pulse of said input pulse signal; and said output pulse of said output means is applied to a reset terminal of said counter to restart a counting of the counter during successive periods of said input pulse signal.
Claim 9
Dependent Claim
32 words
A compensation circuit according to claim 6 wherein said coupling means comprises an OR gate for applying said second pulse signal and said input signal to the input terminal of said flip-flop.
Claim 10
Dependent Claim
77 words
A compensation circuit according to claim 7 wherein an output terminal of said OR gate is coupled to the input terminal of said flip-flop, and wherein said output means comprises an AND gate having a first input terminal connected to an output terminal of said flip-flop and a second input terminal connected to the output terminal of said OR gate for outputting the output pulse of said cutting circuit at the output terminal of said AND gate.
References Cited (Backward Citations)
US2984789A
Cited
US3171041A
Cited
US3383605A
Cited
US3790892A
Cited
US3735271A
Cited
US3970944A
Cited
US4142159A
Cited
US4374361A
Cited
US4427948A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-09-14 | 1991-03-16 | 1991-09-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-09-14 | 1995-03-16 | 1995-09-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-09-14 | 1999-03-16 | 1999-09-15 | $7700.00 | Window Closed / Lapsed |