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US4682264A
Expired / Lapsed
US
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Circuit breaker with digital solid-state trip unit fitted with a calibration circuit
Assignee: GERIN
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Filing: 1986-02-10
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Granted: 1987-07-21
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Expires: 2006-02-10
Abstract
Abstract Microprocessor-based solid-state trip unit (48) processing digital signals derived from analog signals supplied by current sensors (16). The analog signals are applied to a calibration circuit (34), which adapts the output range of the analog circuits to that of the logic circuits, to obtain with an 8-bit Analog-to-Digital Converter (50) associated with a Multiplexer (29) a range equivalent to that of 12-bit processing systems.
Inventors
- 👤 Pierre Demeyer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 12:25
CPC Classifications
H; H02; H02H; H02H1/00; H02H1/0038; H02H3/00; H02H3/08; H02H3/093; H02H3/0935; H02H3/02; H02H3/05
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
301 words
A digital solid-state trip unit for an electrical circuit breaker, comprising: current sensor means for generating analog current signals proportional to respective currents flowing through conductors protected by said breaker; peak-detector means for rectifying said current signals and for producing a direct analog signal representative of a maximum value of said current signals; calibration circuit means connected to said peak-detector means for multiplying said direct analog signal by at least four gains to produce at least four calibrated outputs to be connected to at least four inputs of an addressable multiplexer means, said gains related by predetermined ratios, said calibration circuit means comprising at least two amplifiers having a predetermined gain ratio, each amplifier having an input connected to said direct analog signal and an output connected to a respective one of said at least four inputs of said addressable multiplexer means and a respective divider bridge, each divider bridge having a mid-point connected to a respective one of said at least four inputs of said addressable multiplexer means; said addressable multiplexer means having at least four inputs, connected to said calibrated outputs, for selecting one of said calibrated outputs to provide a multiplexer output signal, said multiplexer output signal being a continuous analog signal representative of said selected calibrated output; digital-to-analog converter means, connected to said multiplexer means, for converting said multiplexer output signal to a sampled digitized signal; digital processing means, connected to said analog-to-digital converter means, for providing a circuit breaker tripping order instantaneously or after a short time delay or long time delay when said digitized signal exceeds respective predetermined levels, said multiplexer means being controlled by said processing means to select one of said calibrated outputs compatible with an input range of said analog-to-digital converter means; and circuit breaker trip means activated by said tripping order.
Claim 2
Dependent Claim
301 words
A digital solid-state trip unit for an electrical circuit breaker, comprising: current sensor means for generating analog current signals proportional to respective currents flowing through conductors protected by said breaker; peak-detector means for rectifying said current signals and for producing a direct analog signal representative of a maximum value of said current signals; calibration circuit means connected to said peak-detector means for multiplying said direct analog signal by at least four gains to produce at least four calibrated outputs to be connected to at least four inputs of an addressable multiplexer means, said gains related by predetermined ratios, said calibration circuit means comprising at least two amplifiers having a predetermined gain ratio, each amplifier having an input connected to said direct analog signal and an output connected to a respective one of said at least four inputs of said addressable multiplexer means and a respective divider bridge, each divider bridge having a mid-point connected to a respective one of said at least four inputs of said addressable multiplexer means; said addressable multiplexer means having at least four inputs, connected to said calibrated outputs, for selecting one of said calibrated outputs to provide a multiplexer output signal, said multiplexer output signal being a continuous analog signal representative of said selected calibrated output; digital-to-analog converter means, connected to said multiplexer means, for converting said multiplexer output signal to a sampled digitized signal; digital processing means, connected to said analog-to-digital converter means, for providing a circuit breaker tripping order instantaneously or after a short time delay or long time delay when said digitized signal exceeds respective predetermined levels, said multiplexer means being controlled by said processing means to select one of said calibrated outputs compatible with an input range of said analog-to-digital converter means; and circuit breaker trip means activated by said tripping order.
Claim 3
Dependent Claim
17 words
A trip unit according to claim 1, wherein said analog-to-digital converter means is an eight-bit analog-to-digital converter.
Claim 4
Dependent Claim
89 words
A trip unit according to claim 1, wherein said processing means controls said multiplexer means to select a calibrated output corresponding to the highest gain of said calibration circuit means, and stores a value of said sampled digitized signal corresponding to said selected calibrated output when said sampled digitized signal exceeds a predetermined value, and wherein said processing means controls said multiplexer to select a calibrated output corresponding to the second highest gain of said calibration circuit means when said sampled digitized signal is lower than said predetermined value.
Claim 5
Dependent Claim
49 words
A trip unit according to claim 3, wherein said processing means multiplies said sampled digitized signal by a predetermined factor related to the ratio between the lowest gain of the calibration circuit means and the gain of the selected calibrated output, said predetermined factor being a power of two.
Claim 6
Dependent Claim
44 words
A trip unit according to claim 1, further comprising: analog ground fault signal detection means, and wherein said calibration circuit means provides an additional calibrated output corresponding to said analog ground fault signal, said additional calibrated output being connected to said addressable multiplexer means.
Claim 7
Dependent Claim
37 words
A trip unit according to claim 1, further comprising a diode protective circuit connected to said calibrated outputs to limit a voltage appearing on said calibrated outputs to a value compatible with characteristics of said multiplexer means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-07-20 | 1991-01-19 | 1991-07-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-07-20 | 1995-01-19 | 1995-07-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-07-20 | 1999-01-19 | 1999-07-21 | $7700.00 | Window Closed / Lapsed |