US4682236A — Read and clear readout circuit and method of oper…

Claim 1

Independent Claim 512 words

In a charge injection device (CID) for optical sensing eliminating readout circuit lag, the combination comprising A. n optical sensor elements (E 1-n ) arranged in an array on a substrate, each element equivalently representable by a capacitor, diode, and battery network, which when reversely biased to a suitable voltage (VB) forms a potential well in which bias charges are maintained, and as a function of optical irradiance, photon induced signal charges are stored, and B. a readout circuit comprising (1) n input terminals (IT 1 , 2, 3 . . . n) each connected to one of said n sensor elements E.sub.(1-n), a node including a sensing line, and a signal output terminal, (2) a first voltage source (VB) and n controllable reset switches (S1 1 , 2, 3 . . . n), for periodically biasing said sensor elements to said charge storing voltage (VB), (3) amplification means (A1) having the input thereof coupled to said node, said node exhibiting a capacitance, and an output (4) (i) a second voltage source (VA) having a value selected to remove charge from said potential wells and (ii) a reset switch (S3) for periodically resetting said node to said second voltage, the resetting of said sensor elements and said node to said first and said second voltages, respectively, occurring simultaneously as the first step in the readout sequence of each sensor element, (5) (i) a third voltage source (VC) having a value selected to remove signal charge remaining in the wells after readout or in excess of said value to skim the bias charge, and (ii) n controllable clear/skim switches (S4 1 , 2, 3, . . . n) for periodically clearing or clearing and skimming each sensor element (6) timing means including (i) a scanning shift register providing an output establishing successive sensor readout intervals and successive clearing or clearing and skimming intervals, and (ii) n element select switches (S2 1 , 2, 3 . . . n) controlled by said register for connecting successive sensor elements for readout to said node to inject the charges stored in said wells into the substrate as the voltage at said node and the selected sensor element equalize at a voltage dependent on optical intensity, said injection being the second step in the sensor readout sequence, the (jth) timing means output being coupled to the jth select switch for defining the readout interval for the jth sensor and to a prior (e.g. (j-1)th) clearing or clearing and skimming switch for causing clearing or clearing and skimming operation on said prior (e.g. (j-1)th) sensor element, and thereby clearing or clearing and skimming each sensor element after readout on the following sensor readout interval, and (7) a correlated double sampling circuit whose input is connected to the output of said amplification means, and whose output is connected to said signal output terminal for taking a first voltage sample following reset, but prior to injection, and a second voltage sample during injection, the readout value for the selected sensor representing the difference between said first and second sample voltages.

Claim 2

Dependent Claim 512 words

In a charge injection device (CID) for optical sensing eliminating readout circuit lag, the combination comprising A. n optical sensor elements (E 1-n ) arranged in an array on a substrate, each element equivalently representable by a capacitor, diode, and battery network, which when reversely biased to a suitable voltage (VB) forms a potential well in which bias charges are maintained, and as a function of optical irradiance, photon induced signal charges are stored, and B. a readout circuit comprising (1) n input terminals (IT 1 , 2, 3 . . . n) each connected to one of said n sensor elements E.sub.(1-n), a node including a sensing line, and a signal output terminal, (2) a first voltage source (VB) and n controllable reset switches (S1 1 , 2, 3 . . . n), for periodically biasing said sensor elements to said charge storing voltage (VB), (3) amplification means (A1) having the input thereof coupled to said node, said node exhibiting a capacitance, and an output (4) (i) a second voltage source (VA) having a value selected to remove charge from said potential wells and (ii) a reset switch (S3) for periodically resetting said node to said second voltage, the resetting of said sensor elements and said node to said first and said second voltages, respectively, occurring simultaneously as the first step in the readout sequence of each sensor element, (5) (i) a third voltage source (VC) having a value selected to remove signal charge remaining in the wells after readout or in excess of said value to skim the bias charge, and (ii) n controllable clear/skim switches (S4 1 , 2, 3, . . . n) for periodically clearing or clearing and skimming each sensor element (6) timing means including (i) a scanning shift register providing an output establishing successive sensor readout intervals and successive clearing or clearing and skimming intervals, and (ii) n element select switches (S2 1 , 2, 3 . . . n) controlled by said register for connecting successive sensor elements for readout to said node to inject the charges stored in said wells into the substrate as the voltage at said node and the selected sensor element equalize at a voltage dependent on optical intensity, said injection being the second step in the sensor readout sequence, the (jth) timing means output being coupled to the jth select switch for defining the readout interval for the jth sensor and to a prior (e.g. (j-1)th) clearing or clearing and skimming switch for causing clearing or clearing and skimming operation on said prior (e.g. (j-1)th) sensor element, and thereby clearing or clearing and skimming each sensor element after readout on the following sensor readout interval, and (7) a correlated double sampling circuit whose input is connected to the output of said amplification means, and whose output is connected to said signal output terminal for taking a first voltage sample following reset, but prior to injection, and a second voltage sample during injection, the readout value for the selected sensor representing the difference between said first and second sample voltages.

Claim 3

Dependent Claim 53 words

The combination set forth in claim 1, wherein said timing means causes (1) the first and second steps of readout to occur for the jth element on the (jth) timing means output, and (2) the clearing or clearing and skimming step for the jth element to occur on the (j+1)th timing means output.

Claim 4

Dependent Claim 333 words

An improved method of operation of a charge injection device (CID) for optical sensing eliminating readout circuit lag in which the CID comprises n optical sensor elements arranged in an array on a common substrate, each sensor element when reversely biased to a first voltage forming a potential well in which, as a function of optical irradiance, photon induced signal charges are stored, a readout circuit having n input terminals, each connected to a sensor element, amplification means, and a node connecting a sensing line and the input of said amplification means, said node (having a capacitance), the steps of (1) simultaneously biasing all sensor elements to said first voltage and said node to a second voltage, said second voltage having a value suitable for removing charge from the potential wells of said sensor elements, (2) obtaining a first sample of the voltage on said node at the output of said amplification means after said node has been reset to said second voltage but prior to the following step, (3) injecting optically induced charges stored in a selected jth sensor element into said substrate by connecting said selected sensor element to said node to cause the voltage on said node and on said selected sensor element to equalize, (4) obtaining a second sample of the voltage on said node at the output of said amplification means during injection which when combined subtractively with the first sample provides the readout value for the jth sensor element, and (5) terminating injection and repeating steps 1, 2, etc. for the (j+1)th sensor element, until n sensor elements have been readout, (6) clearing or clearing and skimming optically induced charges stored in said jth sensor element while a subsequent sensor element is being read out by connecting said selected sensor element after readout (after step 4) to a third voltage selected to clear or clear and skim charge remaining after readout from said jth sensor element, and repeating said process, until n sensor elements have been cleared.

Claim 5

Dependent Claim 333 words

An improved method of operation of a charge injection device (CID) for optical sensing eliminating readout circuit lag in which the CID comprises n optical sensor elements arranged in an array on a common substrate, each sensor element when reversely biased to a first voltage forming a potential well in which, as a function of optical irradiance, photon induced signal charges are stored, a readout circuit having n input terminals, each connected to a sensor element, amplification means, and a node connecting a sensing line and the input of said amplification means, said node (having a capacitance), the steps of (1) simultaneously biasing all sensor elements to said first voltage and said node to a second voltage, said second voltage having a value suitable for removing charge from the potential wells of said sensor elements, (2) obtaining a first sample of the voltage on said node at the output of said amplification means after said node has been reset to said second voltage but prior to the following step, (3) injecting optically induced charges stored in a selected jth sensor element into said substrate by connecting said selected sensor element to said node to cause the voltage on said node and on said selected sensor element to equalize, (4) obtaining a second sample of the voltage on said node at the output of said amplification means during injection which when combined subtractively with the first sample provides the readout value for the jth sensor element, and (5) terminating injection and repeating steps 1, 2, etc. for the (j+1)th sensor element, until n sensor elements have been readout, (6) clearing or clearing and skimming optically induced charges stored in said jth sensor element while a subsequent sensor element is being read out by connecting said selected sensor element after readout (after step 4) to a third voltage selected to clear or clear and skim charge remaining after readout from said jth sensor element, and repeating said process, until n sensor elements have been cleared.

Claim 6

Dependent Claim 47 words

The improved method of claim 3 wherein (1) readout (ie, steps 2, 3, 4) occur for the jth element of the (jth) timing means output, and (2) the clearing or clearing and skimming (ie, step 6) for the jth element occurs on the (j+1)th timing means output.

Claim 7

Dependent Claim 495 words

In a charge injection device (CID) for optical sensing eliminating readout circuit lag, the combination comprising A. n optical sensor elements (E 1-n ) arranged in an array on a substrate, each element equivalently representable by a capacitor, diode, and battery network, which when reversely biased to a suitable voltage (VR) forms a potential well in which bias charges are maintained, and as a function of optical irradiance, photon induced signal charges are stored, and B. a readout circuit, comprising (1) n input terminals (IT 1 , 2, 3 . . . n) each connected to one of said n sensor elements E.sub.(1-n), a node including a sensing line, and a signal output terminal, (2) a first voltage source (VR) and n controllable reset switches (S1 1 , 2, 3 . . . n), for periodically biasing said sensor elements to said charge storing voltage (VB), (3) amplification means (A1) having the input thereof coupled to said node, said node exhibiting a capacitance, and an output (4) reset switch (S3) for periodically resetting said node to said first voltage (VR), the resetting of said sensor elements and said node to said first voltage, occurring as the initial step of four steps in the readout sequence of each sensor element, (5) (i) a second voltage source (VC) having a value selected to remove signal charge remaining in the wells after readout or in excess of said value to skim the bias charge, and (ii) n controllable clear/skim switches (S4 1 , 2, 3, . . . n) for periodically clearing or clearing and skimming each sensor element (6) timing means including (i) a scanning shift register providing an output establishing successive clearing or clearing and skimming intervals, and (ii) n element select switches (S2 1 , 2, 3 . . . n) controlled by said register for connecting successive sensor elements for readout to said node, during the time the select switch is closed, (iii) a capacitor (CI) connected to said node for coupling an injection pulse (phi I) to said node and a selected sensor element as a third step in the readout sequence, the (jth) timing means output being coupled to the jth select switch for defining the readout interval for the jth sensor and to a prior (e.g. (j-1)th) clearing or clearing and skimming switch for causing clearing or clearing and skimming operation on said prior (e.g. (j-1)th) sensor element, and thereby clearing or clearing and skimming each sensor element after readout on the following sensor readout interval, and (7) a correlated double sampling circuit whose input is connected to the output of said amplification means, and whose output is connected to said signal output terminal for taking a first voltage sample as a second step following reset and during selection, but prior to injection, and a second voltage sample after injection as a fourth step, the readout value for the selected sensor representing the difference between said first and second sample voltages.

Claim 8

Dependent Claim 495 words

In a charge injection device (CID) for optical sensing eliminating readout circuit lag, the combination comprising A. n optical sensor elements (E 1-n ) arranged in an array on a substrate, each element equivalently representable by a capacitor, diode, and battery network, which when reversely biased to a suitable voltage (VR) forms a potential well in which bias charges are maintained, and as a function of optical irradiance, photon induced signal charges are stored, and B. a readout circuit, comprising (1) n input terminals (IT 1 , 2, 3 . . . n) each connected to one of said n sensor elements E.sub.(1-n), a node including a sensing line, and a signal output terminal, (2) a first voltage source (VR) and n controllable reset switches (S1 1 , 2, 3 . . . n), for periodically biasing said sensor elements to said charge storing voltage (VB), (3) amplification means (A1) having the input thereof coupled to said node, said node exhibiting a capacitance, and an output (4) reset switch (S3) for periodically resetting said node to said first voltage (VR), the resetting of said sensor elements and said node to said first voltage, occurring as the initial step of four steps in the readout sequence of each sensor element, (5) (i) a second voltage source (VC) having a value selected to remove signal charge remaining in the wells after readout or in excess of said value to skim the bias charge, and (ii) n controllable clear/skim switches (S4 1 , 2, 3, . . . n) for periodically clearing or clearing and skimming each sensor element (6) timing means including (i) a scanning shift register providing an output establishing successive clearing or clearing and skimming intervals, and (ii) n element select switches (S2 1 , 2, 3 . . . n) controlled by said register for connecting successive sensor elements for readout to said node, during the time the select switch is closed, (iii) a capacitor (CI) connected to said node for coupling an injection pulse (phi I) to said node and a selected sensor element as a third step in the readout sequence, the (jth) timing means output being coupled to the jth select switch for defining the readout interval for the jth sensor and to a prior (e.g. (j-1)th) clearing or clearing and skimming switch for causing clearing or clearing and skimming operation on said prior (e.g. (j-1)th) sensor element, and thereby clearing or clearing and skimming each sensor element after readout on the following sensor readout interval, and (7) a correlated double sampling circuit whose input is connected to the output of said amplification means, and whose output is connected to said signal output terminal for taking a first voltage sample as a second step following reset and during selection, but prior to injection, and a second voltage sample after injection as a fourth step, the readout value for the selected sensor representing the difference between said first and second sample voltages.

Claim 9

Dependent Claim 48 words

The combination set forth in claim 5, wherein said timing means causes (1) the readout to occur for the jth element on the (jth) timing means output, and (2) the clearing or clearing and skimming step for the jth element to occur on the (j+1)th timing means output.

Claim 10

Dependent Claim 314 words

An improved method of operation of a charge injection device (CID) for optical sensing eliminating readout circuit lag in which the CID comprises n optical sensor elements arranged in an array on a common substrate, each sensor element when reversely biased to a first voltage forming a potential well in which, as a function of optical irradiance, photon induced signal charges are stored, a readout circuit having n input terminals, each connected to a sensor element, amplification means, and a node connecting a sensing line and the input of said amplification means, said node having a capacitance, the steps of (1) simultaneously biasing all sensor elements and said node to a first voltage (VR), (2) selecting a jth sensor element for readout by connecting said selected sensor element to said node, (3) obtaining a first sample of the voltage on said node at the output of said amplification means after reset of said node and selection of the jth sensor element, (4) injecting optically induced charge stored in the jth sensor element into said substrate by capacitively coupling an injection pulse (phi I) to said node and said jth sensor element, (5) obtaining a second sample of the voltage on said node at the output of said amplification means after injection which when combined subtractively with the first sample provides the readout value for the jth sensor element, and (6) terminating readout and repeating steps 1, 2, etc. for the (j+1)th sensor element, until n sensor elements have been readout, (7) clearing or clearing and skimming optically induced charges stored in said jth sensor element while a subsequent sensor element is being read out by connecting said selected sensor element after readout to a second voltage (VC) selected to clear or clear and skim charge remaining after readout from said jth sensor element, and repeating said process, until n sensor elements have been cleared.

Claim 11

Dependent Claim 314 words

An improved method of operation of a charge injection device (CID) for optical sensing eliminating readout circuit lag in which the CID comprises n optical sensor elements arranged in an array on a common substrate, each sensor element when reversely biased to a first voltage forming a potential well in which, as a function of optical irradiance, photon induced signal charges are stored, a readout circuit having n input terminals, each connected to a sensor element, amplification means, and a node connecting a sensing line and the input of said amplification means, said node having a capacitance, the steps of (1) simultaneously biasing all sensor elements and said node to a first voltage (VR), (2) selecting a jth sensor element for readout by connecting said selected sensor element to said node, (3) obtaining a first sample of the voltage on said node at the output of said amplification means after reset of said node and selection of the jth sensor element, (4) injecting optically induced charge stored in the jth sensor element into said substrate by capacitively coupling an injection pulse (phi I) to said node and said jth sensor element, (5) obtaining a second sample of the voltage on said node at the output of said amplification means after injection which when combined subtractively with the first sample provides the readout value for the jth sensor element, and (6) terminating readout and repeating steps 1, 2, etc. for the (j+1)th sensor element, until n sensor elements have been readout, (7) clearing or clearing and skimming optically induced charges stored in said jth sensor element while a subsequent sensor element is being read out by connecting said selected sensor element after readout to a second voltage (VC) selected to clear or clear and skim charge remaining after readout from said jth sensor element, and repeating said process, until n sensor elements have been cleared.

Claim 12

Dependent Claim 45 words

The improved method of claim 7 wherein (1) readout (ie, steps 1-5) occur for the jth element of the (jth) timing means output, and (2) the clearing or clearing and skimming (ie, step 7) for the jth element occurs on the (j+1)th timing means output.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1990-07-20	1991-01-19	1991-07-21	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1994-07-20	1995-01-19	1995-07-21	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1998-07-20	1999-01-19	1999-07-21	$7700.00	Window Closed / Lapsed

Read and clear readout circuit and method of operation of an IR sensing charge injection device

Abstract

Inventors

Bibliographic Details

Claims Analysis

References Cited (Backward Citations)

USPTO Annuity & Maintenance Windows

Assigned Categories & Tags

Assign Category Tag