Patent US4680603A successfully refreshed from Google Patents.
US4680603A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Graded extended drain concept for reduced hot electron effect
Assignee: Intersil Corp
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Filing: 1985-04-12
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Granted: 1987-07-14
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Expires: 2005-04-12
Abstract
Abstract Hot electron injection into the gate oxides of MOSFET devices imposes limitations on the miniaturization of such devices in VLSI circuits. A buried channel with a graded, buried spacer is provided to guard against hot electron trapping effects while preserving process and structure compatibility with micron or submicron VLSI devices. The channel current is redirected into a buried channel at a distance away from the interface in the vicinity of the drain region where the hot electron effect is most likely to occur.
Inventors
- 👤 Ching-Yeu Wei
- 👤 Joseph M. Pimbley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 10:50
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D64/00; H10D64/60; H10D64/66; H10D64/68; H10D64/691; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0156; H10P30/21; H10P30/212; H10P32/00; H10P32/10; H10P32/14; H10P32/1404; H10P32/1406; H10P32/17; H10P32/171
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
190 words
A metal oxide semiconductor field effect transistor comprising: a semiconductor body doped with a first polarity dopant; an insulating layer disposed over a portion of said body; and an electrically conductive gate electrode disposed over said insulating layer so as to be electrically insulated from said semiconductor body; said semiconductor body having a source region heavily doped with a second polarity dopant and a drain region heavily doped with said second polarity dopant, said source and drain regions being disposed in said semiconductor body to a specified depth on either side of said gate electrode; said semiconductor body also having a lightly doped protrusion extending from at least one of said source and said drain regions, said dopant in said protrusion being a second polarity dopant, each said protrusion being disposed beneath the surface of said semiconductor body and extending toward the region beneath said gate electrode, each said protrusion being spaced apart from the boundary between said semiconductor body and said insulating layer and each said protrusion having a graded region substantially surrounding said protrusion, said protrusion also including at least two second polarity dopants exhibiting distinct diffusivity characteristics.
Claim 2
Dependent Claim
190 words
A metal oxide semiconductor field effect transistor comprising: a semiconductor body doped with a first polarity dopant; an insulating layer disposed over a portion of said body; and an electrically conductive gate electrode disposed over said insulating layer so as to be electrically insulated from said semiconductor body; said semiconductor body having a source region heavily doped with a second polarity dopant and a drain region heavily doped with said second polarity dopant, said source and drain regions being disposed in said semiconductor body to a specified depth on either side of said gate electrode; said semiconductor body also having a lightly doped protrusion extending from at least one of said source and said drain regions, said dopant in said protrusion being a second polarity dopant, each said protrusion being disposed beneath the surface of said semiconductor body and extending toward the region beneath said gate electrode, each said protrusion being spaced apart from the boundary between said semiconductor body and said insulating layer and each said protrusion having a graded region substantially surrounding said protrusion, said protrusion also including at least two second polarity dopants exhibiting distinct diffusivity characteristics.
Claim 3
Dependent Claim
16 words
The transistor of claim 1 further including side spacers on either side of said gate electrode.
Claim 4
Dependent Claim
18 words
The transistor of claim 2 in which said spacers are between approximately 0.1 and 0.2 microns in width.
Claim 5
Dependent Claim
26 words
The device of claim 1 in which said protrusions extend outwardly from adjacent heavily doped portions for a distance of between approximately 0.1 and 0.2 microns.
Claim 6
Dependent Claim
24 words
The transistor of claim 1 in which said protrusions are disposed approximately 1,000 angstroms below the interface between said oxide and said semiconductor body.
Claim 7
Dependent Claim
31 words
The transistor of claim 1 in which said heavily doped regions extend approximately from the surface of said semiconductor body to a depth of between approximately 1,500 and 4,000 angstroms therein.
Claim 8
Dependent Claim
24 words
The transistor of claim 1 in which said first polarity dopant comprises a p-type dopant and said second type dopant comprises an n-type dopant.
Claim 9
Dependent Claim
13 words
The transistor of claim 1 in which said transistor is an n-channel device.
Claim 10
Dependent Claim
15 words
The transistor of claim 1 in which said one of said light dopants comprises arsenic.
Claim 11
Dependent Claim
15 words
The transistor of claim 1 in which said one of said light dopants comprises phosphorous.
Claim 12
Dependent Claim
12 words
The transistor of claim 1 in which said semiconductor body comprises silicon.
Claim 13
Dependent Claim
21 words
The transistor of claim 1 in which said said semiconductor body comprises an n-doped semiconductor substrate including a p-doped well therein.
Claim 14
Dependent Claim
13 words
The transistor of claim 1 in which said insulating layer comprises silicon oxide.
Claim 15
Dependent Claim
24 words
The transistor of claim 1 in which said electrically conductive gate comprises material selected from the group consisting of metals and doped polycrystalline silicon.
Claim 16
Dependent Claim
27 words
The transistor of claim 1 in which said heavily doped region is formed at an implant dosage of approximately 8×10 15 atoms of dopant per square centimeter.
Claim 17
Dependent Claim
30 words
The transistor of claim 1 in which said lightly doped regions are formed at an implant dosage of between approximately 10 12 and 10 14 dopant atoms per square centimeter.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-07-13 | 1991-01-12 | 1991-07-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-07-13 | 1995-01-12 | 1995-07-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-07-13 | 1999-01-12 | 1999-07-14 | $7700.00 | Window Closed / Lapsed |