Patent US4679246A successfully refreshed from Google Patents.
US4679246A
Expired / Lapsed
US
⏱️ 0.0 years remaining
One-shot tuning circuit
Assignee: RCA Licensing Corp
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Filing: 1985-05-01
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Granted: 1987-07-07
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Expires: 2005-05-01
Abstract
Abstract A one-shot tuning system for microprocessor controlled tuning systems uses a table look-up (105) to provide an offset value in response to a deviation error in the intermediate frequency of the tuner. This offset value is loaded into the programmable frequency divider (101) of the tuner to complete the tuning process.
Inventors
- 👤 Tzong K. Jeng
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 14:34
CPC Classifications
H; H03; H03J; H03J7/00; H03J7/02; H03J7/04; H03J7/06; H03J7/065
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
137 words
In a microprocessor controlled phase locked loop tuning system of the type wherein the microprocessor is responsive to a user input station or channel selection to produce an output to a programmable frequency divider in the phase locked loop which determines the nominal local oscillator frequency and the intermediate frequency of the tuning system is detected to produce an error voltage indicative of the deviation of the intermediate frequency from a designed value, the improvement comprising: analog-to-digital converter means for converting said error voltage to a digital number; and table look-up means addressed by said digital number for providing an offset value for loading in said programmable frequency divider, said programmable frequency divider thereafter providing an output which determines the final local oscillator frequency and the intermediate frequency of the tuning system to complete the tuning process.
Claim 2
Dependent Claim
137 words
In a microprocessor controlled phase locked loop tuning system of the type wherein the microprocessor is responsive to a user input station or channel selection to produce an output to a programmable frequency divider in the phase locked loop which determines the nominal local oscillator frequency and the intermediate frequency of the tuning system is detected to produce an error voltage indicative of the deviation of the intermediate frequency from a designed value, the improvement comprising: analog-to-digital converter means for converting said error voltage to a digital number; and table look-up means addressed by said digital number for providing an offset value for loading in said programmable frequency divider, said programmable frequency divider thereafter providing an output which determines the final local oscillator frequency and the intermediate frequency of the tuning system to complete the tuning process.
Claim 3
Dependent Claim
111 words
A process for fast tuning of a microprocessor controlled phase locked loop tuner comprising the steps of: loading a divisor in a programmable frequency divider of the phase locked loop in response to a user selection of a station or channel to be received, comparing a resulting intermediate frequency of the tuner with a design frequency to produce a deviation error, and using the deviation error to address a table look-up to find an offset divisor for loading in said programmable frequency divider, said programmable frequency divider thereafter providing an output which determines the final local oscillator frequency and the intermediate frequency of the tuning system to complete the tuning process.
Claim 4
Dependent Claim
111 words
A process for fast tuning of a microprocessor controlled phase locked loop tuner comprising the steps of: loading a divisor in a programmable frequency divider of the phase locked loop in response to a user selection of a station or channel to be received, comparing a resulting intermediate frequency of the tuner with a design frequency to produce a deviation error, and using the deviation error to address a table look-up to find an offset divisor for loading in said programmable frequency divider, said programmable frequency divider thereafter providing an output which determines the final local oscillator frequency and the intermediate frequency of the tuning system to complete the tuning process.
Claim 5
Dependent Claim
130 words
A one-shot tuning system comprising: tuner means including a voltage controlled oscillator for coverting a radio frequency input signal to an intermediate frequency signal; phase locked loop means including a microprocessor responsive to a user input for loading a divisor in a programmable frequency divider to generate a control voltage for said voltage controlled oscillator; detector means for comparing the intermediate frequency signal from said tuner means with a nominal frequency and generating an error signal; and table look-up means responsive to said error signal for reading out an offset value which is loaded by said microprocessor in said programmable frequency divider, said programmable frequency divider thereafter providing an output which determines the final local oscillator frequency and the intermediate frequency of the tuning system to complete the tuning process.
Claim 6
Dependent Claim
130 words
A one-shot tuning system comprising: tuner means including a voltage controlled oscillator for coverting a radio frequency input signal to an intermediate frequency signal; phase locked loop means including a microprocessor responsive to a user input for loading a divisor in a programmable frequency divider to generate a control voltage for said voltage controlled oscillator; detector means for comparing the intermediate frequency signal from said tuner means with a nominal frequency and generating an error signal; and table look-up means responsive to said error signal for reading out an offset value which is loaded by said microprocessor in said programmable frequency divider, said programmable frequency divider thereafter providing an output which determines the final local oscillator frequency and the intermediate frequency of the tuning system to complete the tuning process.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-07-06 | 1991-01-05 | 1991-07-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-07-06 | 1995-01-05 | 1995-07-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-07-06 | 1999-01-05 | 1999-07-07 | $7700.00 | Window Closed / Lapsed |