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US4675651A Expired / Lapsed US ⏱️ 0.0 years remaining

High speed analog digital converter of the dichotomizing type

Assignee: Centre National de la Recherche Scientifique
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Filing: 1985-04-19
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Granted: 1987-06-23
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Expires: 2005-04-19
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Abstract

Abstract A dichotomizing, high speed analog - digital comprises an input stage for the voltage - current conversion of the analog signal, a reference current source, a sequence of N-1 identical cells in series, each comprising a comparator and current dividers, a terminal cell incorporating a comparator, a digital coder receiving a digital signal from each cell and, optionally, a link positioned between the consecutive cells. The analog signal is processed in the cells entirely in current form, the link means making it possible to isolate the potentials between successive cells.

Inventors

  • 👤 Roland Marbot
  • 👤 Jean-Pierre Polonovski

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 10:29
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/34; H03M1/36; H03M1/361; H03M1/366

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 269 words
A high speed analog - digital converter for converting an analog voltage signal V contained in a voltage interval [V o -V ref , V o +V ref ] into a digital value of N bits, wherein the converter comprises an input stage for converting the signal V into a current is which is a function of V-V o and for producing its opposite -i, a reference current source I which is a function of V ref and its opposite -I, N-1 identical cells in series, each cell comprising two current dividers, and means for zero comparison and obtaining the absolute value, said each cell receiving the currents i e and I e and their opposites -i e and -I e and supplying currents i s and I s respectively equal to |i e |-I e :2 and I e :2 and their opposites -i s and -I s , a terminal cell comprising means for the zero comparison and for obtaining the absolute value receiving a current i e and its opposite -i e and at least one follower means, a digital coder receiving the digital signals supplied by the cells and supplying a N binary signal b 1 . . . b N representing the digitized value of the analog voltage signal V, and n connecting or linking means, in which 0≦n≦N-1, each of said connecting or linking means being positioned between two consecutive cells for transmitting the current i s supplied by one cell to the following cell, while isolating the potentials of the means for zero comparison and obtaining the absolute value of said cells.
Claim 2
Dependent Claim 269 words
A high speed analog - digital converter for converting an analog voltage signal V contained in a voltage interval [V o -V ref , V o +V ref ] into a digital value of N bits, wherein the converter comprises an input stage for converting the signal V into a current is which is a function of V-V o and for producing its opposite -i, a reference current source I which is a function of V ref and its opposite -I, N-1 identical cells in series, each cell comprising two current dividers, and means for zero comparison and obtaining the absolute value, said each cell receiving the currents i e and I e and their opposites -i e and -I e and supplying currents i s and I s respectively equal to |i e |-I e :2 and I e :2 and their opposites -i s and -I s , a terminal cell comprising means for the zero comparison and for obtaining the absolute value receiving a current i e and its opposite -i e and at least one follower means, a digital coder receiving the digital signals supplied by the cells and supplying a N binary signal b 1 . . . b N representing the digitized value of the analog voltage signal V, and n connecting or linking means, in which 0≦n≦N-1, each of said connecting or linking means being positioned between two consecutive cells for transmitting the current i s supplied by one cell to the following cell, while isolating the potentials of the means for zero comparison and obtaining the absolute value of said cells.
Claim 3
Dependent Claim 41 words
An analog digital converter according to claim 1 wherein each of the N-1 identical cells comprises follower means receiving the digital signal supplied by the means for zero comparison and obtaining the absolute value and supplying a corresponding digital voltage signal.
Claim 4
Dependent Claim 114 words
An analog - digital converter according to claim 2, wherein the means for the zero comparison and for obtaining the absolute value of each cell comprises a diode bridge, whose high and low potential points are respectively at a fixed potential V U and V D with V U -V D >2.V S , in which V S is the threshold voltage of one diode of the bridge and whose input points respectively receive the current i and its opposite -i, the result of the zero comparison being indicated by the potential of an input point and the currents |i| and -|i| appearing respectively on the low and high potential points of the bridge.
Claim 5
Dependent Claim 33 words
An analog - digital converter according to claim 3, wherein each linking means comprises two current mirrors connected to the high potential point and to the low potential point of the diode bridge.
Claim 6
Dependent Claim 26 words
An analog - digital converter according to claim 4, wherein each current mirror has a transistor, whose emitter and collector respectively constitute the input and output.
Claim 7
Dependent Claim 35 words
An analog - digital converter according to claim 5, wherein each current mirror also comprises a second transistor in Darlington connection with the first transistor, a resistor being placed between the emitters of said transistors.
Claim 8
Dependent Claim 30 words
An analog - digital converter according to claim 5, wherein each current mirror also comprises a diode having a voltage drop between the current mirror input and the transistor emitter.
Claim 9
Dependent Claim 36 words
An analog - digital converter according to claim 7, wherein each current mirror also comprises a second transistor connected in Darlington manner with the first transistor, a resistor being placed between the emitters of said transistors.
Claim 10
Dependent Claim 25 words
An analog - digital converter according to claim 3, wherein it comprises a linking means between each cell of even order and the following cell.
Claim 11
Dependent Claim 56 words
An analog -digital converter according to claim 3, wherein each cell followed by a linking means comprises at least one follower means for supplying the digital coder with a voltage signal, which is a function of the potential of an input point of the means for zero comparison and obtaining the absolute value of said cell.
Claim 12
Dependent Claim 53 words
An analog - digital converter according to claim 3, whereinthe potential difference V U -V D between the high and low points of the diode bridge of each means for the zero comparison and obtaining of the absolute value is equal to the voltage threshold V S of one diode of the bridge.
Claim 13
Dependent Claim 33 words
An analog - digital converter according to claim 3, wherein each diode of the diode bridge of each means for the zero comparison and obtaining of the absolute value is a Schottky diode.
Claim 14
Dependent Claim 21 words
An analog - digital converter according to claim 3, wherein it also comprises at the input a sample and hold circuit.
Claim 15
Dependent Claim 21 words
An analog - digital converter according to claim 3, wherein it comprises N-1 linking orconnecting means placed between the N cells.

References Cited (Backward Citations)

GB1266962A Cited
GB1601115A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-06-22 1990-12-22 1991-06-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-06-22 1994-12-22 1995-06-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-06-22 1998-12-22 1999-06-23 $7700.00 Window Closed / Lapsed

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