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US4673829A Expired / Lapsed US ⏱️ 0.0 years remaining

Charge pump for providing programming voltage to the word lines in a semiconductor memory array

Assignee: Atmel Corp
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Filing: 1985-02-08
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Granted: 1987-06-16
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Expires: 2005-02-08
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Abstract

Abstract A charge pump for providing programming voltages to the word lines of a semiconductor memory array is disclosed. The charge pump, configured as a combination of enhancement and native MOS transistors, prevents DC current from flowing from the source of the programming voltage to ground through unselected word lines, and thereby permits the design of semiconductor programmable memory arrays having on-chip programming voltage generation, allowing for design of semiconductor programmable memory arrays which operate from a single voltage power supply.

Inventors

  • 👤 Anil Gupta

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 00:15
CPC Classifications
G; G11; G11C; G11C5/00; G11C5/14; G11C5/145; G11C16/00; G11C16/02; G11C16/06; G11C16/08; G11C16/30; G11C8/00; G11C8/08; H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/06; H02M3/07

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 206 words
An apparatus for selectively increasing the voltage on one or more of a plurality of conductive lines having inherent distributed capacitance disposed in a semiconductor circuit including: means disposed on said semiconductor circuit for selecting one or more of said conductive lines; switchable high voltage generating means disposed on said semiconductor circuit for generating a high voltage from a lower voltage power supply connected to said semiconductor circuit, switchable voltage pulse generating means disposed on said semiconductor circuit for generating voltage pulses; means for capacitively coupling voltage pulses from said voltage pulse generating means to a voltage node in said semiconductor circuit, transfer means responsive to said selecting means and connected to said voltage node for transferring increments of charge from said high voltage generating means to the inherent distributed capacitance in selected ones of said conductive lines in response to said voltage pulses, said transfer means including switching means cooperating with said selecting means for blocking substantially all of the flow of current through and transfer of charge from said high voltage generating means to said conductive lines which are unselected, means connected to said high voltage generating means and said voltage pulse generating means for enabling them in response to a write enable signal.
Claim 2
Independent Claim 206 words
An apparatus for selectively increasing the voltage on one or more of a plurality of conductive lines having inherent distributed capacitance disposed in a semiconductor circuit including: means disposed on said semiconductor circuit for selecting one or more of said conductive lines; switchable high voltage generating means disposed on said semiconductor circuit for generating a high voltage from a lower voltage power supply connected to said semiconductor circuit, switchable voltage pulse generating means disposed on said semiconductor circuit for generating voltage pulses; means for capacitively coupling voltage pulses from said voltage pulse generating means to a voltage node in said semiconductor circuit, transfer means responsive to said selecting means and connected to said voltage node for transferring increments of charge from said high voltage generating means to the inherent distributed capacitance in selected ones of said conductive lines in response to said voltage pulses, said transfer means including switching means cooperating with said selecting means for blocking substantially all of the flow of current through and transfer of charge from said high voltage generating means to said conductive lines which are unselected, means connected to said high voltage generating means and said voltage pulse generating means for enabling them in response to a write enable signal.

References Cited (Backward Citations)

US4368524A Cited
US4263664A Cited
US4374430A Cited
US4382194A Cited
WO1981003569A1 Cited
US4404475A Cited
US4511811A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-06-15 1990-12-15 1991-06-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-06-15 1994-12-15 1995-06-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-06-15 1998-12-15 1999-06-16 $7700.00 Window Closed / Lapsed

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