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US4670897A Expired / Lapsed US ⏱️ 0.0 years remaining

Circuit testing of telephone grids or the like

Assignee: COMMUNICATIONS TEST DESIGN Inc WEST CHESTER PA A CORP OF PA
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Filing: 1985-09-09
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Granted: 1987-06-02
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Expires: 2005-09-09
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Abstract

Abstract Multiple electrical path assembly as in a telephone grid, is rapidly and accurately checked by grounding one end of all but one of the path conductors, applying a test signal to that one end, detecting the presence or absence of signal on both ends of all conductors, and repeating the procedure for all the conductors, as with a computer containing a microprocessor. Where the conductors are individually switched, they can all be switched on beforehand. Detectors can also be connected to the conductors during the testing, to detect unusually high voltages, and testing can be interrupted when such voltages are detected. Switch actuation can be separately tested by detecting the passage of current that is used to actuate them.

Inventors

  • 👤 Donald F. Parsons
  • 👤 Gerald J. Parsons
  • 👤 Brian D. Greenwald
  • 👤 Elizabeth A. Forsythe

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 13:53
CPC Classifications
H; H04; H04Q; H04Q1/00; H04Q1/18; H04Q1/20; H04Q1/22; H04Q1/24

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 77 words
In the testing of a telephone switching grid, the improvement according to which a microprocessor-controlled set of testing steps are conducted in rapid sequence and the result of each testing step is recorded in rapid sequence, the total time thus spanned being between about 11/2 and about 6 minutes, and the sequence is then repeated several times so that a total of at least five testing sequences are conducted, to thus detect intermittent defects in the grid.
Claim 2
Dependent Claim 77 words
In the testing of a telephone switching grid, the improvement according to which a microprocessor-controlled set of testing steps are conducted in rapid sequence and the result of each testing step is recorded in rapid sequence, the total time thus spanned being between about 11/2 and about 6 minutes, and the sequence is then repeated several times so that a total of at least five testing sequences are conducted, to thus detect intermittent defects in the grid.
Claim 3
Dependent Claim 22 words
The combination of claim 1 in which the microprocessor is connected to automatically repeat the testing sequences the total number of times.

References Cited (Backward Citations)

JPS5398709A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-06-01 1990-12-01 1991-06-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-06-01 1994-12-01 1995-06-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-06-01 1998-12-01 1999-06-02 $7700.00 Window Closed / Lapsed

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