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US4668875A Expired / Lapsed US ⏱️ 0.0 years remaining

Waveshaping circuit

Assignee: Mitsubishi Electric Corp
•
Filing: 1986-04-08
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Granted: 1987-05-26
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Expires: 2006-04-08
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Abstract

Abstract A waveshaping circuit for providing logic levels from a voltage source to a digital circuit comprising a pull-up (or pull-down) resistor for converting the voltage source into voltage signals of predetermined values, a low-pass filter connected to the resistor for eliminating noise components of the voltage signals, a voltage limiter for limiting the voltage signals to a predetermined voltage range, and a voltage divider for receiving and dividing the voltage signals to supply output voltages of high or low logic levels to the digital circuit.

Inventors

  • 👤 Masaaki Miyazaki
  • 👤 Mitsuaki Ishii

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 14:57
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/125; H03K5/1252; H03K5/1254

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 94 words
A waveshaping circuit for providing high and low logic levels from a voltage source to a digital circuit comprising means for converting said voltage source into voltage signals of predetermined values, a low-pass filter connected to said converting means for eliminating noise components of said voltage signals, a voltage limiter for limiting said voltage signals to a predetermined voltage range covering both the high and low logic levels, and a voltage divider for receiving and dividing said voltage signals to supply output voltages corresponding to high or low logic levels to the digital circuit.
Claim 2
Dependent Claim 94 words
A waveshaping circuit for providing high and low logic levels from a voltage source to a digital circuit comprising means for converting said voltage source into voltage signals of predetermined values, a low-pass filter connected to said converting means for eliminating noise components of said voltage signals, a voltage limiter for limiting said voltage signals to a predetermined voltage range covering both the high and low logic levels, and a voltage divider for receiving and dividing said voltage signals to supply output voltages corresponding to high or low logic levels to the digital circuit.
Claim 3
Dependent Claim 39 words
A waveshaping circuit according to claim 1, wherein said voltage limiter comprises a first diode for providing an upper limit of said predetermined voltage range and a second diode for providing a lower limit of said predetermined voltage range.
Claim 4
Dependent Claim 15 words
A waveshaping circuit according to claim 1 wherein said voltage limiter comprises a Zener diode.
Claim 5
Dependent Claim 14 words
A waveshaping circuit according to claim 1 wherein said converting means includes a resistor.

References Cited (Backward Citations)

US3403265A Cited
US3484702A Cited
US3648195A Cited
US3790894A Cited
US3798559A Cited
US3914735A Cited
US4216653A Cited
US4536667A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-05-25 1990-11-24 1991-05-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-05-25 1994-11-24 1995-05-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-05-25 1998-11-24 1999-05-26 $7700.00 Window Closed / Lapsed

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