Two reference voltage weighted capacitor digital to analog converter

Claim 1

A weighted capacitor digital to analog converter comprising: a first reference voltage (V1), a first group of capacitors (C19), one electrode of each being mutually connected, a first group of switches (S1) for electrically connecting the other electrodes of said first group of capacitors either to said first reference voltage or ground potential, a second reference voltage (V2), a second group of capacitors (C21), one electrode of each being mutually connected and also connected to the mutually connected electrodes of said first group of capacitors, a second group of switches (S6) for selectively connecting the other electrodes of said second group of capacitors either to said second reference voltage or ground potential, said first and second groups of switches being selectively switched upon a binary digital signal being applied to each of said switches, a combination of output voltages being applied to the mutually connected electrodes of said capacitors as the output analog signal, an amplifier (A) for amplifying the output analog signal as received from said groups of capacitors, an output capacitor (C11) coupling the output of said amplifier to said input of said amplifier for providing voltage feedback to said amplifier, and an output switch (S11) coupled across said capacitor for neutralizing the charge on said capacitor and thereby neutralizing the output voltage in relation to the input voltage of said amplifier, wherein said output voltage is determined from the relationship ##EQU2## where B equals a binary value, C equals the respective capacitive values, A is the gain of the amplifier, V or is the reset output voltage, V 1 is said first reference voltage, and V2 is said second reference voltage.