Abstract A shift register which, including a plurality of cells each comprising a data latch section and a shift control section, operates without external clocks, wherein the shift control section includes a terminal for receiving a shift start control signal; a terminal for receiving a shift inhibition control signal; a shift allowance control circuit which receives signals indicating as to whether each of the particular cell and the cells adjacent thereto is in a shift operation and signals indicating as to whether each of the adjacent cells is in a state which allows the shift of the particular cell, and generates a shift allowance signal to be given to the particular cell and the adjacent cells on the basis of the states of these cells and the shift inhibition control signal; a shift control circuit which receives the shift start control signal, the output of the shift allowance control circuit, the state signals of the particular cell and the adjacent cell, and makes the data latch section to conduct a shift operation as well as outputs an in-shift-operation signal of the particular cell against the shift control circuit of the adjacent cell; and a shift conclusion control circuit which receives the shift inhibition control signal and the state signals of the particular cell and the adjacent cell, and outputs a signal for ordering to conclude the shift operation to the shift control circuit of the particular cell and a signal indicating the conclusion of shift operation to that of the adjacent cell.
Inventors
👤 Tatsuo Yamada
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-10-28 22:49
CPC Classifications
G; G11; G11C; G11C19/00
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
251 words
A shift register which, including a plurality of cells each comprising a data latch section and a shift control section, operates without external clocks, wherein the shift control section comprises: a terminal for receiving a shift start control signal; a terminal for receiving a shift inhibition control signal; a shift allowance control circuit which receives signals indicating as to whether each of the particular cell and the cells adjacent thereto is in a shift operation and signals indicating as to whether each of the adjacent cells is in a state which allows the shift of the particular cell, and generates a shift allowance signal to be given to the particular cell and the adjacent cells on the basis of the states of these cells and the shift inhibition control signal; a shift control circuit which receives the shift start control signal, the output of the shift allowance control circuit, the state signals of the particular cell and the adjacent cell, and makes the data latch section to conduct a shift operation as well as outputs an in-shift-operation signal of the particular cell against the shift control circuit of the adjacent cell; and a shift conclusion control circuit which receives the shift inhibition control signal and the state signals of the particular cell and the adjacent cell, and outputs a signal for ordering to conclude the shift operation to the shift control circuit of the particular cell and a signal indicating the conclusion of shift operation to that of the adjacent cell.
Claim 2
Dependent Claim
251 words
A shift register which, including a plurality of cells each comprising a data latch section and a shift control section, operates without external clocks, wherein the shift control section comprises: a terminal for receiving a shift start control signal; a terminal for receiving a shift inhibition control signal; a shift allowance control circuit which receives signals indicating as to whether each of the particular cell and the cells adjacent thereto is in a shift operation and signals indicating as to whether each of the adjacent cells is in a state which allows the shift of the particular cell, and generates a shift allowance signal to be given to the particular cell and the adjacent cells on the basis of the states of these cells and the shift inhibition control signal; a shift control circuit which receives the shift start control signal, the output of the shift allowance control circuit, the state signals of the particular cell and the adjacent cell, and makes the data latch section to conduct a shift operation as well as outputs an in-shift-operation signal of the particular cell against the shift control circuit of the adjacent cell; and a shift conclusion control circuit which receives the shift inhibition control signal and the state signals of the particular cell and the adjacent cell, and outputs a signal for ordering to conclude the shift operation to the shift control circuit of the particular cell and a signal indicating the conclusion of shift operation to that of the adjacent cell.
Claim 3
Dependent Claim
27 words
A shift register as defined in claim 1, wherein the shift start control signal terminal and the shift inhibition control signal terminal are provided at desired cells.
Claim 4
Dependent Claim
21 words
A shift register as defined in claim 1, wherein the shift control section includes a circuit for controlling the shift direction.