Impedance sensing anti-theft device

Claim 1

An impedance sensing apparatus for deterring theft of electrical appliances, said apparatus comprising: (a) common voltage source means; (b) an array of multiple voltage divider means connected to said common voltage source means, each of said voltage divider means including input means and output means, said input means of each divider, configured to be interconnected with an electrical applicance and comprising jack means for inserting the input impedance of said appliance into a leg of the divider circuit, a first low voltage a.c. signal being presented at said output means of each divider when an electrical applicance is connected to said input means and a second low voltage a.c. signal being presented at said output means of each divider when the electrical appliance is disconnected from said input means of the divider and comprising an array of means for rectifying and filtering the low voltage a.c. signals to d.c.; each said voltage divider having in one leg a resistive impedence and in the other leg said applicance's input impedance, the resistive impedance being selected to be greater than the expected range of input impedances; (c) high impedance detector means having input means and output means, said detector input means being operatively connected in common to said array of voltage divider means output means, said detector means having first and second states, said detector means being in said first state when all of the electrical applicances of the array are connected and in said second state when one of the electrical applicances is disconnected, a first control signal being presented at said output means of said detector means when said detector means is in said first state and a second control signal being presented at said output means of said detector means when said detector means is in said second state; and (d) alarm means operatively connected to said output means of said detector means for generating an alarm when said detector means is in said second state, and further including latching means connected to said output means of said detector means comprising NAND gates, said latching means operative to maintain said detector means in said second state.