Patent US4654117A successfully refreshed from Google Patents.
US4654117A
Expired / Lapsed
US
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Method of fabricating a thin film transistor array
Assignee: Philips Components Kobe KK
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Filing: 1986-03-14
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Granted: 1987-03-31
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Expires: 2006-03-14
Abstract
Abstract An array of thin film transistors is fabricated by forming a plurality of spaced closely adjacent metallic source and drain electrodes on an array area of a transparent substrate, forming semiconductor layers on the substrate between each adjacent pair of source and drain electrodes in overlapping relation to the edges of each such pair, covering the semiconductor layers with a gate insulation film that extends over substantially all of said array area, forming a transparent gate electrode layer over the gate insulation film, covering the transparent gate electrode layer with a photosensitive resin layer which is then exposed to light through the transparent substrate and transparent gate electrode layer with the metallic source and drain electrodes acting as masks, developing the photosensitive resin layer to remove portions thereof other than the exposed portions, and etching the transparent gate electrode with the remaining portions of the resin layer serving as masks thereby to form the gate electrodes of the thin film transistors in the array.
Inventors
- 👤 Shigeo Aoki
- 👤 Junichi Tamamura
- 👤 Yasuhiro Ukai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 11:43
CPC Classifications
G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/1333; G02F1/1335; G02F1/133509; G02F1/133514; G02F1/1368; G02F1/1345; G02F1/13454; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/948; Y10S438/949
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
215 words
A method of fabricating an array of thin film transistors for use as a display element drive on a transparent substrate of a flat display panel, comprising the steps of: forming a plurality of metallic source and drain electrodes in spaced closely adjacent relation to each other on an array area of the substrate in which an array of thin film transistors is to be located; forming a plurality of semiconductor layers on the substrate to extend between and overlap the edges of adjacent ones of said metallic source and drain electrodes respectively; forming a gate insulation film which extends over substantially the entire area of the array of thin film transistors to cover the semiconductor layers; forming a transparent gate electrode layer on the gate insulation film; forming a photosensitive resin layer on the transparent gate electrode layer; exposing the photosensitive resin layer to light through the transparent substrate and transparent gate electrode layer with the metallic source and drain electrodes serving as masks; developing the photosensitive resin layer to remove portions of said resin layer other than the exposed portions thereof; and etching the transparent gate electrode layer with the remaining portions of the resin layer serving as masks to thereby form the gate electrodes of the thin film transistors in said array.
Claim 2
Independent Claim
215 words
A method of fabricating an array of thin film transistors for use as a display element drive on a transparent substrate of a flat display panel, comprising the steps of: forming a plurality of metallic source and drain electrodes in spaced closely adjacent relation to each other on an array area of the substrate in which an array of thin film transistors is to be located; forming a plurality of semiconductor layers on the substrate to extend between and overlap the edges of adjacent ones of said metallic source and drain electrodes respectively; forming a gate insulation film which extends over substantially the entire area of the array of thin film transistors to cover the semiconductor layers; forming a transparent gate electrode layer on the gate insulation film; forming a photosensitive resin layer on the transparent gate electrode layer; exposing the photosensitive resin layer to light through the transparent substrate and transparent gate electrode layer with the metallic source and drain electrodes serving as masks; developing the photosensitive resin layer to remove portions of said resin layer other than the exposed portions thereof; and etching the transparent gate electrode layer with the remaining portions of the resin layer serving as masks to thereby form the gate electrodes of the thin film transistors in said array.
Claim 3
Dependent Claim
23 words
A method according to claim 1 wherein row metallic electrode lines are formed integrally and simultaneously with respective ones of the source electrodes.
Claim 4
Dependent Claim
51 words
A method according to claim 1 wherein thin-film transistors constituting integrated drive circuits for driving the element drive thin-film transistors in said array are formed on a marginal portion of the substrate outside the said array area simultaneously with the formation of the element drive thin-film transistors in said array area.
Claim 5
Dependent Claim
21 words
A method according to claim 3 wherein the semiconductor layers of all of said thin-film transistors are formed of amorphous silicon.
Claim 6
Dependent Claim
30 words
A method according to claim 4 further comprising the step of annealing said amorphous silicon layers in at least said drive circuits to enhance the mobility of the semiconductor layers.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-30 | 1990-09-29 | 1991-03-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-30 | 1994-09-29 | 1995-03-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-30 | 1998-09-29 | 1999-03-31 | $7700.00 | Window Closed / Lapsed |