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US4654112A Expired / Lapsed US ⏱️ 0.0 years remaining

Oxide etch

Assignee: Texas Instruments Inc
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Filing: 1984-09-26
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Granted: 1987-03-31
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Expires: 2004-09-26
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Abstract

Abstract A new process for plasma etching silicon oxides in integrated circuit structures. A chemistry comprising both oxygen and nitrogen trifluoride is used, with oxygen the dominant component. This provides excellent selectivity to silicon. This etch chemistry also erodes photoresist rapidly, so that it is typically used in combination with a hard-masking process. One particular application of this invention is in a cantilever-etch-mask contact profiling process.

Inventors

  • 👤 Monte A. Douglas
  • 👤 Thomas D. Bonifield

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 20:12
CPC Classifications
C; C03; C03C; C03C15/00; G; G03; G03F; G03F7/00; G03F7/26; G03F7/36; H; H10; H10P; H10P50/00; H10P50/20; H10P50/28; H10P50/282; H10P50/283; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/082; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/945

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 69 words
A process for etching silicon oxides in integrated circuit structures, comprising the steps of: providing a partially fabricated integrated circuit structure having at the surface thereof a dielectric comprising silicon oxides; partially covering said dielectric with a patterned hardmask; and exposing said integrated circuit structure to a plasma in a gas comprising both oxygen and nitrogen trifluoride, the input gas to said plasma comprising more oxygen than nitrogen trifluoride.
Claim 2
Dependent Claim 69 words
A process for etching silicon oxides in integrated circuit structures, comprising the steps of: providing a partially fabricated integrated circuit structure having at the surface thereof a dielectric comprising silicon oxides; partially covering said dielectric with a patterned hardmask; and exposing said integrated circuit structure to a plasma in a gas comprising both oxygen and nitrogen trifluoride, the input gas to said plasma comprising more oxygen than nitrogen trifluoride.
Claim 3
Dependent Claim 26 words
The process of claim 1, wherein said plasma is generated in a gas having a total pressure in a range between 30 microns and 500 microns.
Claim 4
Dependent Claim 19 words
The process of claim 1, wherein said plasma includes more than four times as much oxygen as nitrogen trifluoride.
Claim 5
Dependent Claim 28 words
The process of claim 1, wherein said plasma generation step comprises applying power at an area density in the range between 1 and 0.05 watts per square centimeter.
Claim 6
Dependent Claim 40 words
The process of claim 1, wherein said plasma generating step comprises applying power at a volumetric density between 1 and 10 watts per liter into said gas mixture in the vicinity of said partially fabricated integrated within a reactor chamber.
Claim 7
Dependent Claim 12 words
The process of claim 1, wherein said hardmask consists essentially of polysilicon.
Claim 8
Dependent Claim 13 words
The process of claim 1, wherein said dielectric consists essentially of phosphosilicate glass.
Claim 9
Dependent Claim 12 words
The process of claim 1, wherein said hard mask layer comprises silicon.
Claim 10
Dependent Claim 11 words
The process of claim 1, wherein said dielectric comprises borophosphosilicate glass.
Claim 11
Dependent Claim 107 words
A process for fabricating contacts in integrated circuits, comprising the steps of: providing a partially fabricated integrated circuit structure having at the surface thereof a dielectric comprising silicon oxides; depositing a hard mask layer comprising silicon over said dielectric; etching said hard mask layer in a predetermined pattern to cut holes in said hard mask layer at predetermined contact locations; exposing said integrated circuit structure to a plasma in a gas comprising both oxygen and nitrogen trifluoride, said gas comprising more oxygen than nitrogen trifluoride, to open contact holes in said dielectric; and depositing a patterned conductor to interconnect said contact holes in a predetermined circuit configuration.
Claim 12
Dependent Claim 107 words
A process for fabricating contacts in integrated circuits, comprising the steps of: providing a partially fabricated integrated circuit structure having at the surface thereof a dielectric comprising silicon oxides; depositing a hard mask layer comprising silicon over said dielectric; etching said hard mask layer in a predetermined pattern to cut holes in said hard mask layer at predetermined contact locations; exposing said integrated circuit structure to a plasma in a gas comprising both oxygen and nitrogen trifluoride, said gas comprising more oxygen than nitrogen trifluoride, to open contact holes in said dielectric; and depositing a patterned conductor to interconnect said contact holes in a predetermined circuit configuration.

References Cited (Backward Citations)

US4310380A Cited
US4412119A Cited
US4522681A Cited
US4568410A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-03-30 1990-09-29 1991-03-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-03-30 1994-09-29 1995-03-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-03-30 1998-09-29 1999-03-31 $7700.00 Window Closed / Lapsed

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