US4648059A
Expired / Lapsed
US
⏱️ 0.0 years remaining
N-bit magnitude comparator
Assignee: Motorola Solutions Inc
•
Filing: 1984-09-13
•
Granted: 1987-03-03
•
Expires: 2004-09-13
Abstract
Abstract A circuit for selectively determining whether a first number is greater than or equal to or less than or equal to a second number, comprising a means for adding a first number and a complementary function of a second number, and logic means for generating a signal for carry-in and for combination with a carry-out of the means for adding for producing a signal indicative of whether the second number is within the parameters established by the first number and the carry-in.
Inventors
- 👤 Arthur J. Gregorcyk
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 19:45
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/02; G06F7/026
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
103 words
A circuit for comparing a first number to a second number comprising: select means for selecting one of a determination of whether the first number is greater than or equal to the second number and a determination of whether the first number is less than or equal to the second number; complement means for providing a complement of the first number; adder means for adding the complement of the first number to the second number and for producing a carry-out signal; and output means responsive to the carry-out signal and to the select means for providing a true-false indication of the selected determination.
Claim 2
Dependent Claim
103 words
A circuit for comparing a first number to a second number comprising: select means for selecting one of a determination of whether the first number is greater than or equal to the second number and a determination of whether the first number is less than or equal to the second number; complement means for providing a complement of the first number; adder means for adding the complement of the first number to the second number and for producing a carry-out signal; and output means responsive to the carry-out signal and to the select means for providing a true-false indication of the selected determination.
Claim 3
Dependent Claim
43 words
A circuit as set forth in claim 1 wherein the complement of the first number is one of a one's complement and a two's complement and wherein the select means further selects whether the complement is a one's complement or a two's complement.
Claim 4
Dependent Claim
36 words
A circuit as set forth in claim 2 wherein the select means further comprises means for providing a single digital value as input to a carry-in input of the adder means and to the output means.
Claim 5
Dependent Claim
16 words
A circuit as set forth in claim 3 wherein said output means comprises an Exclusive-NOR gate.
Claim 6
Independent Claim
98 words
A method of comparing a first number to a second number comprising the steps of: selecting one of a determination of whether the first number is greater than or equal to the second number and a determination of whether the first number is less than or equal to the second number; providing a complement of the first number; adding the complement of the first number to the second number in an adder and producing a carry-out signal; and logically operating on the carry out signal in an output means to produce a true-false indication of the selected determination.
Claim 7
Independent Claim
98 words
A method of comparing a first number to a second number comprising the steps of: selecting one of a determination of whether the first number is greater than or equal to the second number and a determination of whether the first number is less than or equal to the second number; providing a complement of the first number; adding the complement of the first number to the second number in an adder and producing a carry-out signal; and logically operating on the carry out signal in an output means to produce a true-false indication of the selected determination.
Claim 8
Dependent Claim
42 words
A method as set forth in claim 5 wherein the complement of the first number is one of a one's complement and a two's complement and the step of selecting further comprises a selection of the one's complement or the two's complement.
Claim 9
Dependent Claim
38 words
A method as set forth in claim 6 wherein the step of selecting further comprises the step of providing a single digital value as a carry-in input to the adder and as an input to the output means.
Claim 10
Dependent Claim
16 words
A method as set forth in claim 7 wherein the output means comprises an Exclusive-NOR gate.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-02 | 1990-09-01 | 1991-03-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-02 | 1994-09-01 | 1995-03-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-02 | 1998-09-01 | 1999-03-03 | $7700.00 | Window Closed / Lapsed |