Patent US4647874A successfully refreshed from Google Patents.
US4647874A
Expired / Lapsed
US
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Doppler signal processing circuitry
Assignee: United States Department of the Army
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Filing: 1986-06-09
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Granted: 1987-03-03
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Expires: 2006-06-09
Abstract
Abstract Circuitry is disclosed for processing Doppler-shifted radar signals or ot noisy signals which fluctuate widely in frequency. The circuitry includes a dual channel discriminator including a voltage controlled oscillator as part of a feedback loop for frequency tracking of said signals. The discriminator further includes a frequency pass circuit in one channel thereof and a frequency stop circuit in the other channel thereof, with the outputs of these circuits applied to a multiplier. The multiplier output controls the frequency of the voltage controlled oscillator. The voltage controlled oscillator output is heterodyned with the input signals to obtain the heterodyned signals for application to the aforementioned two channels of the discriminator.
Inventors
- 👤 Otto E. Rittenbach
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 17:54
CPC Classifications
G; G01; G01S; G01S13/00; G01S13/02; G01S13/50; G01S13/58; G01S13/585; G01S13/586; G01S13/581; H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/087
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
347 words
Signal processing circuitry comprising: an input source of Doppler signals including a first given signal frequency containing information related to movement of a target; a first multiplier having a first input connected to receive said signal from said source, a second input, and an output including a second signal frequency; a voltage controlled oscillator having an input and an output, said output having a third frequency connected to said second input of said first multiplier; a first frequency selective filter having an input and an output, and input being connected to said first multiplier output and selecting said second signal frequency therefrom; a frequency pass circuit having an input and an output, said input being connected to the output of said first filter to pass said second signal frequency; an analog multiplier having a first input connected to the output of said frequency pass circuit and having a second input and an output; a frequency stop circuit having an input and an output, said output being connected to said second input of said analog multiplier, said frequency pass and stop circuits being tuned to the same frequency; means for applying a quadrature phase shifted signal of said second frequency to the input of said frequency stop circuit so that the inputs of said frequency stop and pass circuits are 90° out of phase, the response characteristics of said frequency stop and pass circuits being such that the output of said frequency stop circuit is of opposite phase with respect to said frequency pass circuit output below resonance and the outputs from said frequency stop and pass circuits are of the same phase above resonance; and a low pass filter having an input and an output, said input being connected to said output of said analog multiplier, and said output being a direct voltage connected to said input of said voltage controlled oscillator to control said third frequency and providing an output signal proportional to target velocity for said processing circuit, said frequency pass and stop circuits and analog multiplier and low pass filter providing a frequency discriminator.
Claim 2
Dependent Claim
347 words
Signal processing circuitry comprising: an input source of Doppler signals including a first given signal frequency containing information related to movement of a target; a first multiplier having a first input connected to receive said signal from said source, a second input, and an output including a second signal frequency; a voltage controlled oscillator having an input and an output, said output having a third frequency connected to said second input of said first multiplier; a first frequency selective filter having an input and an output, and input being connected to said first multiplier output and selecting said second signal frequency therefrom; a frequency pass circuit having an input and an output, said input being connected to the output of said first filter to pass said second signal frequency; an analog multiplier having a first input connected to the output of said frequency pass circuit and having a second input and an output; a frequency stop circuit having an input and an output, said output being connected to said second input of said analog multiplier, said frequency pass and stop circuits being tuned to the same frequency; means for applying a quadrature phase shifted signal of said second frequency to the input of said frequency stop circuit so that the inputs of said frequency stop and pass circuits are 90° out of phase, the response characteristics of said frequency stop and pass circuits being such that the output of said frequency stop circuit is of opposite phase with respect to said frequency pass circuit output below resonance and the outputs from said frequency stop and pass circuits are of the same phase above resonance; and a low pass filter having an input and an output, said input being connected to said output of said analog multiplier, and said output being a direct voltage connected to said input of said voltage controlled oscillator to control said third frequency and providing an output signal proportional to target velocity for said processing circuit, said frequency pass and stop circuits and analog multiplier and low pass filter providing a frequency discriminator.
Claim 3
Dependent Claim
29 words
The circuitry of claim 1 wherein said frequency pass circuit comprises a tuned filter and said frequency stop circuit comprises a tuned trap, both tuned to the same frequency.
Claim 4
Dependent Claim
33 words
The circuit of claim 1 wherein said frequency pass circuit comprises a series connected resistor-capacitor with the capacitor grounded and said frequency stop circuit comprises a series-connected resistor-capacitor circuit with the resistor grounded.
Claim 5
Dependent Claim
121 words
The signal processing circuitry of claim 1 wherein said means for applying a quadrature phase shifted signal includes a third multiplier having a first input connected to receive said signal from said source, a second input, and an output including said second frequency; said voltage controlled oscillator including a second output; a 90° phase shifter having an input connected to said second output of said oscillator and an output connected to said second input of said third multiplier; a second frequency selective filter having an input connected to said output of said third multiplier and an output selecting said second frequency phase shifted by 90°, said second frequency selective filter output being connected to the input of said frequency stop circuit.
Claim 6
Dependent Claim
47 words
The signal processing circuit of claim 1 wherein said means for applying a quadrature phase shifted signal includes a 90° phase shifter having an input connected to the output of said first frequency selective filter and an output connected to the input of said frequency stop circuit.
Claim 7
Dependent Claim
120 words
The signal processing circuitry of claim 1 wherein said source includes first and second channels of said first frequency, said second channel having said first frequency phase shifted by 90°, said means for applying said quadrature phase shifted signal including a third multiplier having a first input connected to receive said first phase shifted frequency, a second input, and an output including said second frequency phase shifted by 90°; said voltage controlled oscillator including a second output connected to said second input of said third multiplier, a second frequency selective filter having an input connected to said output of said third multiplier and an output selecting said phase shifted second frequency connected to the input of said frequency stop circuit.
Claim 8
Dependent Claim
141 words
The signal processing circuitry of claim 1 wherein said means for applying a quadrature phase shifted signal includes a third multiplier having a first input, a second input, and an output including said second frequency; a first -45° phase shifter connected between said first multiplier first input and said input signal source; a second +45° phase shifter connected between said first input of said third multiplier and said input signal source; said voltage controlled oscillator including a second output connected to said second input of said third multiplier; a second frequency selective filter having an input connected to said third multiplier output and an output selecting said second frequency phase shifted by +45°, the output of said first frequency selective filter being phase shifted by -45°, said output of second filter being connected to the input of said frequency stop circuit.
Claim 9
Dependent Claim
94 words
The circuitry of claim 6, wherein said first and second channels comprise dual-channel i and q nonbaseband Doppler signals and wherein said first inputs of said first and third multipliers are connected respectively to said i and q channels and a 0° or 180° switchable phase shifter is connected between the second output of said voltage controlled oscillator and the second input of said third multiplier, a flip-flop having an output connected to control the phase shift of said switchable phase shifter and an input connected to the output of said low pass filter.
Claim 10
Dependent Claim
92 words
The circuitry of claim 6 wherein said first and second channels comprise dual channel baseband i and q Doppler signals, means to apply said i and q channels to the first inputs of said first and third multipliers via a reversing switch adapted to interchange the i and q channels to each of said first and third multipliers, and a flip-flop arranged to control the state of said reversing switch, the state of said flip-flop being controlled by the same voltage which is applied to the input of said voltage controlled oscillator.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-02 | 1990-09-01 | 1991-03-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-02 | 1994-09-01 | 1995-03-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-02 | 1998-09-01 | 1999-03-03 | $7700.00 | Window Closed / Lapsed |