US4647830A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Series inverter circuit with timing responsive to reflective current
Assignee: Cynosure LLC
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Filing: 1982-11-24
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Granted: 1987-03-03
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Expires: 2002-11-24
Abstract
Abstract A series inverter, high voltage capacitor charging circuit includes current sensors for sensing the current through each SCR in the circuit. The sensed current is used to vary the gating frequency of the SCRs and to preclude firing of an SCR until the other is in a stable off condition. The gating of each SCR is delayed by an amount of time determined by a control capacitor charging circuit. That charging circuit is inhibited as long as one of the SCRs is conducting and once the load voltage has reached a predetermined level. The time constant of that charging circuit can be changed as the desired level is approached of if insufficient reverse bias is applied to an SCR for quick turn-off of the SCR. Resolution of the system can be increased by a shunt regulator which shorts the output transformer. The circuit can be disabled if the high voltage capacitor does not reach its set level within a given time.
Inventors
- 👤 George L. Bees
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 09:47
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/22; H02M3/24; H02M3/28; H02M3/305; H02M3/315; H02M3/3155
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
154 words
A series inverter circuit comprising electronic switches connected in a push pull configuration, with a diode connected antiparallel to each switch, and a common load circuit, the load current causing reflective current through each diode following current through a respective switch, the circuit comprising: means for sensing at least one electric parameter of the inverter circuit indicative of reflective current; gate control means responsive to the at least one sensed electric parameter for directly gating each electronic switch "on" a predetermined time after current flow through the other switch has dropped to about zero, that predetermined time being greater than the time required for the other switch to settle to a stable off condition, the gate control means including means for increasing said predetermined time when the sensed parameter indicates insufficient reflective current for rapid turn off of a switch such that the switch requires greated time to settle to a stable off condition.
Claim 2
Dependent Claim
154 words
A series inverter circuit comprising electronic switches connected in a push pull configuration, with a diode connected antiparallel to each switch, and a common load circuit, the load current causing reflective current through each diode following current through a respective switch, the circuit comprising: means for sensing at least one electric parameter of the inverter circuit indicative of reflective current; gate control means responsive to the at least one sensed electric parameter for directly gating each electronic switch "on" a predetermined time after current flow through the other switch has dropped to about zero, that predetermined time being greater than the time required for the other switch to settle to a stable off condition, the gate control means including means for increasing said predetermined time when the sensed parameter indicates insufficient reflective current for rapid turn off of a switch such that the switch requires greated time to settle to a stable off condition.
Claim 3
Dependent Claim
25 words
A circuit as claimed in claim 1 wherein a sensed parameter is the amplitude of reflective current resulting from the forward current through the switch.
Claim 4
Dependent Claim
15 words
A circuit as claimed in claim 1 wherein the electronic switches are silicon controlled rectifiers.
Claim 5
Dependent Claim
17 words
A circuit as claimed in claim 1 wherein the load circuit comprises a laser firing load capacitor.
Claim 6
Dependent Claim
27 words
A circuit as claimed in claim 1 including means for disabling the gate control means when the voltage level of a load capacitor reaches a predetermined level.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-03-02 | 1990-09-01 | 1991-03-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-03-02 | 1994-09-01 | 1995-03-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-03-02 | 1998-09-01 | 1999-03-03 | $7700.00 | Window Closed / Lapsed |