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US4646261A Expired / Lapsed US ⏱️ 0.0 years remaining

Local video controller with video memory update detection scanner

Assignee: Motorola Solutions Inc
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Filing: 1983-09-27
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Granted: 1987-02-24
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Expires: 2003-09-27
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Abstract

Abstract In a system including a central processor, central memory, and local video controller communicating with a video terminal, the video terminal including a terminal processor and a video memory for storing video information for displaying on the terminal screen, a change detect circuit is provided in the local video controller for detecting whenever a change has occurred in that portion of the central memory containing video information to be displayed on the terminal's video screen. Responsive to the change detect circuit, the local video controller sends updated video information to the video memory at the terminal. The change detect circuit reduces the workload on the system by sending only the updated video information to the terminal. The change detect circuit is capable of operation with a system employing multiple terminals each having multiple independent screen display areas.

Inventors

  • 👤 Ed C. Ng

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 02:22
CPC Classifications
G; G09; G09G; G09G1/00; G09G1/007; G06; G06F; G06F3/00; G06F3/14; G06F3/1415

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 244 words
A data processing system comprising: a central processor; a central memory for storing information in the form of instructions and data, said memory comprising a plurality of change detect blocks; a communications controller; bus means coupled to said processor, memory, and controller for conducting address, data, and control information; a terminal coupled to said bus means and communicating with said central processor and central memory through said communications controller, said terminal comprising a video display which is segmented into at least two independent display segments, each segment having at least one change detect block assigned to it; and change detect circuitry coupled to said communications controller for detecting any change in the data stored in a change detect block assigned to said terminal, and for transmitting the changed data to said terminal, said change detect circuitry comprising: memory means comprising a change map, said change map comprising a plurality of memory storage locations, one for each of said change detect blocks; address monitoring means for monitoring the address corresponding to any memory write operation to one of said change detect blocks of said central memory corresponding to one of said display segments of said terminal and for causing a status indication to be stored in the one of said memory storage locations corresponding to said one change detect block; and means responsive to said status indication for transmitting to said one display segment of said terminal the data in said one change detect block.
Claim 2
Dependent Claim 244 words
A data processing system comprising: a central processor; a central memory for storing information in the form of instructions and data, said memory comprising a plurality of change detect blocks; a communications controller; bus means coupled to said processor, memory, and controller for conducting address, data, and control information; a terminal coupled to said bus means and communicating with said central processor and central memory through said communications controller, said terminal comprising a video display which is segmented into at least two independent display segments, each segment having at least one change detect block assigned to it; and change detect circuitry coupled to said communications controller for detecting any change in the data stored in a change detect block assigned to said terminal, and for transmitting the changed data to said terminal, said change detect circuitry comprising: memory means comprising a change map, said change map comprising a plurality of memory storage locations, one for each of said change detect blocks; address monitoring means for monitoring the address corresponding to any memory write operation to one of said change detect blocks of said central memory corresponding to one of said display segments of said terminal and for causing a status indication to be stored in the one of said memory storage locations corresponding to said one change detect block; and means responsive to said status indication for transmitting to said one display segment of said terminal the data in said one change detect block.
Claim 3
Dependent Claim 21 words
The data processing system recited in claim 1, wherein each segment has more than one change detect block assigned to it.

References Cited (Backward Citations)

US3792462A Cited
US3956739A Cited
US4070710A Cited
US4074254A Cited
US4119953A Cited
US4204206A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-02-23 1990-08-25 1991-02-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-02-23 1994-08-25 1995-02-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-02-23 1998-08-25 1999-02-24 $7700.00 Window Closed / Lapsed

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