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US4442504A Expired / Lapsed US ⏱️ 0.0 years remaining

Modular programmable controller

Assignee: Allen Bradley Co LLC
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Filing: 1981-10-21
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Granted: 1984-04-10
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Expires: 2001-10-21
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Abstract

Abstract A programmable controller is formed by connecting separate functional modules to a common backplane bus. A bus arbitration scheme and a message handling technique are disclosed to tightly couple the functional modules together to form an efficient programmable controller. A number of improvements to the CPU module and I/O scanner module are disclosed to further improve the performance of the resulting system.

Inventors

  • 👤 Ernst H. Dummermuth
  • 👤 Daniel J. Galdun
  • 👤 Raymond A. Grudowski
  • 👤 Daniel L. Stewart

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 12:49
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/36; G06F13/362; G05; G05B; G05B19/00; G05B19/02; G05B19/04; G05B19/05; G05B19/052; G06F13/10; G06F13/12; G06F13/124; G06F13/20; G06F13/22; G05B2219/00; G05B2219/10; G05B2219/11; G05B2219/1103; G05B2219/1159; G05B2219/13; G05B2219/13017; G05B2219/15; G05B2219/15011; G05B2219/15018; G05B2219/15078

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 240 words
A programmable controller which comprises: a backplane bus having leads for conducting data signals, leads for conducting address signals, and leads for conducting control signals; a memory module connected to the leads in the backplane bus for conducting data, address and control signals and including means for storing a control program comprised of a set of macroinstructions, and means for storing a data table; a CPU module connected to the leads in the backplane bus for conducting data, address and control signals and including (a) CPU arbitration means for obtaining access to the backplane bus, (b) fetch means coupled to the CPU arbitration means and being responsive to a FETCH signal to generate address and control signals on the backplane bus and to thereby obtain a macroinstruction from the control program in said memory module through the backplane bus and store it in a macroinstruction register, (c) memory means for storing an I/O image table, (d) CPU processor means coupled to said fetch means, said memory means and said CPU arbitration means, said processor means being operable to repeatedly execute the control program by sequentially executing macroinstructions in said macroinstruction register and generating FETCH signals to said fetch means, and in doing so, to read and write data to the I/O image table in said memory means and to read and write data to the data table in said memory module through said CPU arbitration means and said backplane bus.
Claim 2
Dependent Claim 240 words
A programmable controller which comprises: a backplane bus having leads for conducting data signals, leads for conducting address signals, and leads for conducting control signals; a memory module connected to the leads in the backplane bus for conducting data, address and control signals and including means for storing a control program comprised of a set of macroinstructions, and means for storing a data table; a CPU module connected to the leads in the backplane bus for conducting data, address and control signals and including (a) CPU arbitration means for obtaining access to the backplane bus, (b) fetch means coupled to the CPU arbitration means and being responsive to a FETCH signal to generate address and control signals on the backplane bus and to thereby obtain a macroinstruction from the control program in said memory module through the backplane bus and store it in a macroinstruction register, (c) memory means for storing an I/O image table, (d) CPU processor means coupled to said fetch means, said memory means and said CPU arbitration means, said processor means being operable to repeatedly execute the control program by sequentially executing macroinstructions in said macroinstruction register and generating FETCH signals to said fetch means, and in doing so, to read and write data to the I/O image table in said memory means and to read and write data to the data table in said memory module through said CPU arbitration means and said backplane bus.
Claim 3
Dependent Claim 95 words
The programmable controller as recited in claim 1 which includes an I/O scanner module connected to the leads in the backplane bus for conducting data, address and control signals and in which the I/O scanner module includes; (a) scanner arbitration means for obtaining access to the backplane bus, (b) scanner processor means coupled to the scanner arbitration means and being operable to input data from sensing devices connected to the programmable controller and to couple the input data to the I/O image table in the CPU module through the scanner arbitration means and backplane bus.
Claim 4
Dependent Claim 51 words
The programmable controller as recited in claim 2 in which the memory module includes means for storing data indicative of the status of the CPU module and the I/O scanner module and each of said modules includes means for reading the status data of the other module from the memory module.
Claim 5
Dependent Claim 66 words
The programmable controller as recited in claim 2 in which the I/O scanner module includes an output image storage means, the CPU processor means is operable to write output data to said output image storage means through said backplane bus and said scanner processor means is operable to couple said output data from said output image storage means to output devices connected to the programmable controller.
Claim 6
Dependent Claim 123 words
The programmable controller as recited in claim 2 which includes a peripheral processor module connected to the leads in the backplane bus for conducting address, data and control signals, and in which the peripheral processor module includes, (a) peripheral processor arbitration means for obtaining access to the backplane bus, (b) an input/output port for conveying data to and from a peripheral device, and (c) peripheral processor processor means coupled to the peripheral processor arbitration means and said input/output port, said peripheral processor processor means being operable to input data through said input/output port and apply it to other modules connected to the backplane bus and to read data from other modules connected to the backplane bus and output it through said input/output port.
Claim 7
Dependent Claim 45 words
The programmable controller as recited in claim 1 in which the fetch means includes a plurality of macroinstruction latches connected to said macroinstruction register, and macroinstructions are obtained from the control program and stored in said macroinstruction latches while previous macroinstructions are still being executed.
Claim 8
Dependent Claim 51 words
The programmable controller as recited in claim 2 which includes a communications network module connected to the leads in the backplane bus for conducting address, data and control signals, the communications network module being operable to couple data between a serial data highway and other modules connected to the backplane bus.
Claim 9
Dependent Claim 47 words
The programmable controller as recited in claim 2 which includes a front panel circuit for inputting data and displaying data and the front panel circuit connects to dedicated control leads in the backplane bus which connect the front panel circuit to another module in the programmable controller.
Claim 10
Dependent Claim 176 words
A programmable controller which comprises: processor means for executing a control program to operate output devices connected to the programmable controller; and I/O scanner means connected to the processor means and coupled to the output devices, the I/O scanner means including: (a) means for storing an output image table which indicates the desired state of the output devices; (b) refresh means for continuously and sequentially coupling the output image table data to corresponding output devices; (c) means for coupling data indicative of changes in the state of output devices from the processor means to locations in the output image table storing means; (d) means coupled to the last named means for detecting the state changes made in the output image table by the processor means; and (e) output means coupled to the means for detecting state changes in the output image table, and being operable in response to such a detected state change in a selected output image table location to output image table data to the corresponding output device and to thereby update its state.
Claim 11
Dependent Claim 176 words
A programmable controller which comprises: processor means for executing a control program to operate output devices connected to the programmable controller; and I/O scanner means connected to the processor means and coupled to the output devices, the I/O scanner means including: (a) means for storing an output image table which indicates the desired state of the output devices; (b) refresh means for continuously and sequentially coupling the output image table data to corresponding output devices; (c) means for coupling data indicative of changes in the state of output devices from the processor means to locations in the output image table storing means; (d) means coupled to the last named means for detecting the state changes made in the output image table by the processor means; and (e) output means coupled to the means for detecting state changes in the output image table, and being operable in response to such a detected state change in a selected output image table location to output image table data to the corresponding output device and to thereby update its state.
Claim 12
Dependent Claim 105 words
The programmable controller as recited in claim 9 in which the means for storing the output image table is a random access memory having separately addressable locations, the means for coupling data from the processor means to the output image table generates the address of the location to be changed in the random access memory and generates a memory write signal, and the means for detecting such state changes made in the output image table includes: change storage means for storing data indicative of a change in the sensed output image table memory address when such sensed address is accompanied by a memory write signal.
Claim 13
Dependent Claim 56 words
The programmable controller as recited in claim 10 in which the means for detecting state changes made in the output image table further includes means coupled to the change storage means for erasing a change indication for an output image table memory address when the address is sensed during the generation of a memory read signal.
Claim 14
Dependent Claim 270 words
A programmable controller, the combination comprising: a plurality of separate, asynchronously operating functional modules connected to a common backplane bus, each functional module including: (a) arbitration means for obtaining control of the backplane bus to perform a read or write operation with another functional module; (b) message storage means for storing data, said message storage means having designated backplane address; (c) message handler means coupled to the arbitration means and the message storage means for coupling message data between its message storage means and the message storage means on another functional module; and memory means coupled to the backplane bus for storing a plurality of module message blocks, each module message block being associated with a respective one of the functional modules, and each module message block including: (d) means for storing a backplane interrupt address which may be read by other functional modules and employed by them to indicate that message data is available for the associated functional module; and (e) means for storing the backplane address of message data which is available for the associated functional module; wherein the message handler means for one of said functional modules which is sending message data to another one of said functional modules on the backplane bus is operable to store the backplane address of the message data in the module message block for the receiving functional module and is operable to read the receiving module's interrupt address from its module message block and generate the same on the backplane bus to interrupt the receiving functional module and to thereby notify the receiving module that message data is available for it.
Claim 15
Dependent Claim 270 words
A programmable controller, the combination comprising: a plurality of separate, asynchronously operating functional modules connected to a common backplane bus, each functional module including: (a) arbitration means for obtaining control of the backplane bus to perform a read or write operation with another functional module; (b) message storage means for storing data, said message storage means having designated backplane address; (c) message handler means coupled to the arbitration means and the message storage means for coupling message data between its message storage means and the message storage means on another functional module; and memory means coupled to the backplane bus for storing a plurality of module message blocks, each module message block being associated with a respective one of the functional modules, and each module message block including: (d) means for storing a backplane interrupt address which may be read by other functional modules and employed by them to indicate that message data is available for the associated functional module; and (e) means for storing the backplane address of message data which is available for the associated functional module; wherein the message handler means for one of said functional modules which is sending message data to another one of said functional modules on the backplane bus is operable to store the backplane address of the message data in the module message block for the receiving functional module and is operable to read the receiving module's interrupt address from its module message block and generate the same on the backplane bus to interrupt the receiving functional module and to thereby notify the receiving module that message data is available for it.
Claim 16
Dependent Claim 49 words
The programmable controller as recited in claim 12 in which the message storage means in each functional module includes means for storing a parameter block which contains data that identifies the sending functional module and which indicates a function that is to be performed by the receiving functional module.
Claim 17
Dependent Claim 175 words
In a control system having a plurality of backplane slots and a plurality of separate, asynchronously operating functional modules located in the backplane slots and connected to a common backplane bus and in which each module is operable through arbitration means for gaining control of the backplane bus to perform a read or write operation with another module connected to the backplane bus, the improvement therein comprising: a memory module connected to the backplane bus and storing data structures associated with functional modules connected to the backplane bus, each such data structure including means for storing the backplane bus address of its associated functional module; and power-up means connected to the arbitration means on one of said functional modules, the power-up means including means for examining each backplane slot to determine the presence of each functional module in the control system, and means for establishing a data structure in the memory module for each functional module which is present and for writing the backplane address of each such functional module into its associated data structure.
Claim 18
Dependent Claim 175 words
In a control system having a plurality of backplane slots and a plurality of separate, asynchronously operating functional modules located in the backplane slots and connected to a common backplane bus and in which each module is operable through arbitration means for gaining control of the backplane bus to perform a read or write operation with another module connected to the backplane bus, the improvement therein comprising: a memory module connected to the backplane bus and storing data structures associated with functional modules connected to the backplane bus, each such data structure including means for storing the backplane bus address of its associated functional module; and power-up means connected to the arbitration means on one of said functional modules, the power-up means including means for examining each backplane slot to determine the presence of each functional module in the control system, and means for establishing a data structure in the memory module for each functional module which is present and for writing the backplane address of each such functional module into its associated data structure.
Claim 19
Dependent Claim 48 words
The control system as recited in claim 14 in which the power-up means also determines the type of each functional module connected to the backplane bus and the means for establishing a data structure also writes data into the functional module's associated data structure which indicates its type.
Claim 20
Dependent Claim 42 words
The control system as recited in claim 14 in which the power-up means includes means coupled to the examining means and responsive to the examining means for determining if the functional modules connected to the backplane bus provide an operable control system.
Claim 21
Dependent Claim 254 words
A programmable controller which comprises: a backplane bus having leads for conducting data signals, leads for conducting address signals, and leads for conducting control signals; a memory module connected to the leads in the backplane bus and including means for storing an I/O image table which indicates the state of sensing devices and operating devices connected to the programmable controller; I/O scanner means connected to the leads in the backplane bus and being operable to periodically couple data between the I/O image table and the operating devices and sensing devices connected to the programmable controller; a CPU module connected to the leads in the backplane bus and being operable in response to the instructions in a control program to examine the state of the I/O image table and to alter the state of the I/O image table in accordance with the logic embodied in the control program; and a peripheral processor module connected to the leads in the backplane bus and including means for inputting data from a terminal and means responsive to the input data and a stored program for writing data to the I/O image table which alters the state thereof, and in which the CPU module, I/O scanner means and the peripheral processor module each include arbitration means coupled to the leads in the backplane bus and the arbitration means are operable to enable only one of the CPU module, I/O scanner means or peripheral processor module to access the I/O image table in the memory module at any single moment.
Claim 22
Dependent Claim 254 words
A programmable controller which comprises: a backplane bus having leads for conducting data signals, leads for conducting address signals, and leads for conducting control signals; a memory module connected to the leads in the backplane bus and including means for storing an I/O image table which indicates the state of sensing devices and operating devices connected to the programmable controller; I/O scanner means connected to the leads in the backplane bus and being operable to periodically couple data between the I/O image table and the operating devices and sensing devices connected to the programmable controller; a CPU module connected to the leads in the backplane bus and being operable in response to the instructions in a control program to examine the state of the I/O image table and to alter the state of the I/O image table in accordance with the logic embodied in the control program; and a peripheral processor module connected to the leads in the backplane bus and including means for inputting data from a terminal and means responsive to the input data and a stored program for writing data to the I/O image table which alters the state thereof, and in which the CPU module, I/O scanner means and the peripheral processor module each include arbitration means coupled to the leads in the backplane bus and the arbitration means are operable to enable only one of the CPU module, I/O scanner means or peripheral processor module to access the I/O image table in the memory module at any single moment.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-04-10 1987-10-10 1988-04-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-04-10 1991-10-10 1992-04-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-04-10 1995-10-10 1996-04-10 $7700.00 Window Closed / Lapsed

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