Patent US4645957A successfully refreshed from Google Patents.
US4645957A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Normally-off semiconductor device with low on resistance and circuit analogue
Assignee: Fairchild Semiconductor Corp
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Filing: 1984-12-24
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Granted: 1987-02-24
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Expires: 2004-12-24
Abstract
Abstract A semiconductor device incorporates a JFET serially connected to a bipolar transistor to achieve normally-off operation. An impedance element is connected between the base of the bipolar transistor and the gate of the JFET, which serves as a single control electrode for the entire device. When a current is supplied to the control electrode, the bipolar transistor and JFET are both switched to the on state. In the JFET, the P-N junction between the gate region and the channel region is sufficiently forward-biased so as to inject current carriers into its channel region and markedly reduce the device on-resistance. An electrical circuit analogue of the device achieves the advantage of low on-resistance and normally-off operation.
Inventors
- 👤 Bantval J. Baliga
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 17:32
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/567; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10D84/403; H10D84/409
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
148 words
A normally-off, gate controlled electrical circuit with low on-resistance, comprising: a junction field-effect transistor adapted for operation in a bipolar mode having source, drain, and gate electrodes; a bipolar transistor having collector, emitter, and base electrodes; interconnection means for ohmically connecting said source electrode to said collector electrode; and impedance means electrically interposed between said gate and base electrodes for ensuring turn on of said bipolar transistor after turn on of said junction field effect transistor; said drain electrode and said emitter electrode being adapted to carry load current through the electrical circuit when the circuit is in its current conductive state, and said gate electrode being adapted to receive control signals to control the conductivity state of the circuit, said control signals when received being of a potential sufficient for causing said junction field-effect transistor to operate in a bipolar mode and assume a low on-resistance state.
Claim 2
Dependent Claim
148 words
A normally-off, gate controlled electrical circuit with low on-resistance, comprising: a junction field-effect transistor adapted for operation in a bipolar mode having source, drain, and gate electrodes; a bipolar transistor having collector, emitter, and base electrodes; interconnection means for ohmically connecting said source electrode to said collector electrode; and impedance means electrically interposed between said gate and base electrodes for ensuring turn on of said bipolar transistor after turn on of said junction field effect transistor; said drain electrode and said emitter electrode being adapted to carry load current through the electrical circuit when the circuit is in its current conductive state, and said gate electrode being adapted to receive control signals to control the conductivity state of the circuit, said control signals when received being of a potential sufficient for causing said junction field-effect transistor to operate in a bipolar mode and assume a low on-resistance state.
Claim 3
Dependent Claim
25 words
The electrical circuit of claim 1 wherein said junction field-effect transistor is of the N-channel type, and said bipolar transistor is of the N-P-N type.
Claim 4
Dependent Claim
36 words
The electrical device circuit of claim 1 wherein said impedance means comprises a resistor, one side of which is connected to said base terminal and the other side of which is connected to said gate terminal.
Claim 5
Dependent Claim
15 words
The electrical current of claim 1 wherein said bipolar transistor exhibits a low breakdown voltage.
Claim 6
Dependent Claim
231 words
A normally-off, gate-controlled electrical circuit with low on-resistance, comprising: a junction field-effect transistor having source, drain, and gate electrodes; a region of one type conductivity separating said source and drain electrodes; a region of opposite type conductivity separating said gate electrode from said source and drain electrodes and said region of opposite type conductivity forming a junction with said region of one type conductivity; said gate electrode under reverse bias conditions being adapted to receive control signals for forming a depletion region in said region of one type conductivity between said source and drain electrodes, said depletion region establishing a potential barrier between the source and drain electrodes such that the potential of the source electrode remains low even for high potentials applied to the drain electrode; a low breakdown voltage bipolar transistor having collector, emitter, and base electrodes; interconnection means for ohmically connecting said source electrode to said collector electrode; and impedance means electrically interposed between said gate and base electrodes; and said drain electrode and said emitter electrode being adapted to carry load current through the electrical circuit, and said gate electrode under forward bias conditions being adapted to receive control signals for forward biasing said junction between said opposite type conductivity region and said one type conductivity region to increase the conductivity of said one type conductivity region and thereby to control the conductivity state of the circuit.
Claim 7
Dependent Claim
231 words
A normally-off, gate-controlled electrical circuit with low on-resistance, comprising: a junction field-effect transistor having source, drain, and gate electrodes; a region of one type conductivity separating said source and drain electrodes; a region of opposite type conductivity separating said gate electrode from said source and drain electrodes and said region of opposite type conductivity forming a junction with said region of one type conductivity; said gate electrode under reverse bias conditions being adapted to receive control signals for forming a depletion region in said region of one type conductivity between said source and drain electrodes, said depletion region establishing a potential barrier between the source and drain electrodes such that the potential of the source electrode remains low even for high potentials applied to the drain electrode; a low breakdown voltage bipolar transistor having collector, emitter, and base electrodes; interconnection means for ohmically connecting said source electrode to said collector electrode; and impedance means electrically interposed between said gate and base electrodes; and said drain electrode and said emitter electrode being adapted to carry load current through the electrical circuit, and said gate electrode under forward bias conditions being adapted to receive control signals for forward biasing said junction between said opposite type conductivity region and said one type conductivity region to increase the conductivity of said one type conductivity region and thereby to control the conductivity state of the circuit.
References Cited (Backward Citations)
US3963946A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-02-23 | 1990-08-25 | 1991-02-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-02-23 | 1994-08-25 | 1995-02-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-02-23 | 1998-08-25 | 1999-02-24 | $7700.00 | Window Closed / Lapsed |