US4644561A
Expired / Lapsed
US
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Modem for RF subscriber telephone system
Assignee: InterDigital Technology Corp
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Filing: 1985-03-20
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Granted: 1987-02-17
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Expires: 2005-03-20
Abstract
Abstract A modem including a modulator section for converting a bit stream, wherein each given number of successive bits defines a symbol, into a phase modulated intermediate frequency (IF) signal, the symbols in the modulator section being phase modulated and then digitally filtered to provide a filtered signal that, when converted into an analog signal, provides a modulation signal of a frequency that is centered about a predetermined frequency and deviates therefrom in accordance with the value of the phase modulated symbol, the analog signal then being filtered and passed to a mixer for up conversion to an IF signal; and a demodulator section for converting the IF signal into a bit stream, the demodulator section including a microprocessor which not only filters received digital signals but contains a memory for storing filter coefficients for use in the filtering of received digital signals; the modem being also operable in a training mode wherein a sequence of predetermined symbols is provided to the filter in the modulator section and the resultant phase modulated IF signal is receivable in the demodulator section, the microprocessor acting to adjust the filter coefficients stored in its memory until the reconstructed phase modulated symbols correspond to the sequence of predetermined symbols provided to the filter in the modulator section.
Inventors
- 👤 Eric Paneth
- 👤 David N. Critchlow
- 👤 Moshe Yehushua
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 16:15
CPC Classifications
H; H03; H03K; H03K7/00; H03K7/04; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/227; H04L27/2271; H04L27/2273; H04L27/20; H04L27/2032
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
95 words
A multiple phase demodulator comprising an input means to provide a phase-modulated input signal; a generator for generating a steady-state signal comprising a sine wave alternatley shifted ninety degrees; a mixing means for combining said steady-state signal with said input signal to form a resultant signal; an analog-to-digital converter for converting said resultant signal to digital form; means including a digital memory means to conform the converted resultant signal to signals of predetermined frequencies; and recovery means to recover the digital information from said conformed resultant signal, thereby producing a digital bit stream as output.
Claim 2
Dependent Claim
95 words
A multiple phase demodulator comprising an input means to provide a phase-modulated input signal; a generator for generating a steady-state signal comprising a sine wave alternatley shifted ninety degrees; a mixing means for combining said steady-state signal with said input signal to form a resultant signal; an analog-to-digital converter for converting said resultant signal to digital form; means including a digital memory means to conform the converted resultant signal to signals of predetermined frequencies; and recovery means to recover the digital information from said conformed resultant signal, thereby producing a digital bit stream as output.
Claim 3
Dependent Claim
15 words
The demodulator of claim 1 wherein an input filter is coupled to said mixing means.
Claim 4
Dependent Claim
34 words
The demodulator of claim 1 wherein said recovery means is in circuit with a time delay compensation means for the purpose of compensating for varied time delays in the reception of different input signals.
Claim 5
Dependent Claim
25 words
The demodulator of claim 1 wherein said recovery means is in circuit with a control information extracting means to extract control information from said output.
Claim 6
Dependent Claim
25 words
The demodulator of claim 1, wherein said recovery means is in circuit with a timing information extracting means for extracting timing information from said output.
Claim 7
Dependent Claim
24 words
The demodulator of claim 1, wherein said recovery means is in circuit with sequence information extracting means to extract sequence information from said output.
Claim 8
Dependent Claim
26 words
The demodulator of claim 1, wherein said recovery means is in circuit with frame synchronization information extraction means to extract frame synchronization information from said output.
Claim 9
Dependent Claim
208 words
A modem comprising a multiple phase modulator and a multiple phase demodulator; said modulator comprising means for converting an input constituting a digitized bit stream into symbols, each symbol being defined by a given number of successive bits; a phase modulation means for phase modulating each symbol; a digitally implemented filter for shaping and generating a waveform from each of said symbols in accordance with the specifications of the frequency channel over which said symbols are transmitted, each of each waveforms constituting a transmitted symbol; and a digital-to-analog converter for converting each of said transmitted symbols to an analog signal; said demodulator comprising an input means to apply a phase-modulated input signal from said modulator; a generator for generating a steady-state signal containing both in-phase (I) and quadrature phase (Q) waveforms that are alternately phase shifted ninety degrees from each other; a mixing means for combining said steady-state signal with said input signal to form a resultant signal; an analog-to-digital converter for converting the resultant signal to digital form; means including a digital memory means to conform the converted resultant signal to signals of predetermined frequencies; and recovery means to recover the digital information from said conformed resultant signal, thereby producing a digital bit stream as an output.
Claim 10
Dependent Claim
208 words
A modem comprising a multiple phase modulator and a multiple phase demodulator; said modulator comprising means for converting an input constituting a digitized bit stream into symbols, each symbol being defined by a given number of successive bits; a phase modulation means for phase modulating each symbol; a digitally implemented filter for shaping and generating a waveform from each of said symbols in accordance with the specifications of the frequency channel over which said symbols are transmitted, each of each waveforms constituting a transmitted symbol; and a digital-to-analog converter for converting each of said transmitted symbols to an analog signal; said demodulator comprising an input means to apply a phase-modulated input signal from said modulator; a generator for generating a steady-state signal containing both in-phase (I) and quadrature phase (Q) waveforms that are alternately phase shifted ninety degrees from each other; a mixing means for combining said steady-state signal with said input signal to form a resultant signal; an analog-to-digital converter for converting the resultant signal to digital form; means including a digital memory means to conform the converted resultant signal to signals of predetermined frequencies; and recovery means to recover the digital information from said conformed resultant signal, thereby producing a digital bit stream as an output.
Claim 11
Dependent Claim
73 words
The modem of claim 8 wherein a channel control means is in circuit with said phase modulation means and wherein a scanning means is in circuit with said channel control means to scan the frequency selected by the channel control means to determine the presence or absence of an amplitude modulation signal comprising a predetermined number of symbols, and means to acquire a radio control channel when said amplitude modulation signal is present.
Claim 12
Independent Claim
135 words
A system for converting a bit stream, wherein each given number of successive bits defines a symbol, into a phase modulated intermediate frequency (IF) signal at a predetermined IF frequency, comprising phase modulating means for phase modulating each of said symbols; filtering means for digitally filtering each phase modulated symbol to provide a filter output comprising time-shared digital in-phase (I) and quadrature phase (Q) waveforms, said filter output, when converted to an analog signal, providing a modulation signal of a modulation frequency that is centered about a predetermined frequency and that deviates therefrom in accordance with the value of the phase modulated symbol; means for converting the filter output into an analog signal to provide a modulation signal; and means for multiplying said modulation signal by a fixed predetermined frequency having sin and cos components.
Claim 13
Independent Claim
135 words
A system for converting a bit stream, wherein each given number of successive bits defines a symbol, into a phase modulated intermediate frequency (IF) signal at a predetermined IF frequency, comprising phase modulating means for phase modulating each of said symbols; filtering means for digitally filtering each phase modulated symbol to provide a filter output comprising time-shared digital in-phase (I) and quadrature phase (Q) waveforms, said filter output, when converted to an analog signal, providing a modulation signal of a modulation frequency that is centered about a predetermined frequency and that deviates therefrom in accordance with the value of the phase modulated symbol; means for converting the filter output into an analog signal to provide a modulation signal; and means for multiplying said modulation signal by a fixed predetermined frequency having sin and cos components.
Claim 14
Dependent Claim
27 words
A system according to claim 10, wherein the phase modulating means comprises means for converting the symbols in accordance with a differential phase shift keying (DPSK) code.
Claim 15
Dependent Claim
23 words
A system according to claim 10, wherein the filtering means filters a plurality of phase modulated symbols simultaneously in a sequentialy overlapping relationship.
Claim 16
Dependent Claim
18 words
A system according to claim 12, wherein the filtering means comprises a finite-duration, impulse response (FIR) digital filter.
Claim 17
Dependent Claim
50 words
A system according to claim 13, wherein the FIR filter samples each phase modulated symbol a predetermined number of times, with successive simultaneous samples being factored together in accordance with a predetermined sequential pattern to provide the filter output that, when converted to an analog signal, provides said modulation signal.
Claim 18
Dependent Claim
35 words
A system according to claim 14, wherein the FIR filter comprises a read only memory (ROM) that provides the filter output in accordance with the combined digital values of the simultaneously sample phase modulated symbols.
Claim 19
Dependent Claim
18 words
A system according to claim 10, wherein the filtering means comprises a finite-duration, impulse response (FIR) digital filter.
Claim 20
Dependent Claim
46 words
A system according to claim 16, wherein the FIR filter samples each symbol a predetermined number of times, with successive samples being factored in accordance with a predetermined sequential pattern to provide the filtered signal that, when converted to an analog signal, provides said modulation signal.
Claim 21
Dependent Claim
31 words
A system according to claim 17, wherein the FIR filter comprises a read only memory (ROM) that provides the filtered signal in accordance withthe digital value of the phase modulated signal.
Claim 22
Dependent Claim
126 words
A system according to claim 16 further comprising demodulating means for converting a received phase modulated IF signal to the bit stream from which it was derived, and wherein the demodulating means comprises means for mixing the received phase modulated IF signal with a steady-state signal of the same frequency as the steady-state signal used to produce said phase modulated IF signal to thereby provide a received analog signal; means for converting the received analog signal into a received digital signal; a FIR digital filter for digitally filtering the received digital signal to provide phase modulated symbols; and means for converting the received phase modulated symbols into a received bit stream corresponding to the bit stream from which the received phase modulated IF signal was derived.
Claim 23
Dependent Claim
47 words
A system according to claim 19, wherein, within the demodulating means, the FIR digital filter comprises a microprocessor for filtering of the received digital signal, and wherein the microporcessor includes a memory for storing FIR filter coefficients for use in the filtering of said received digital signal.
Claim 24
Dependent Claim
75 words
A system according to claim 20, further comprising means for providing a sequence of predetermined symbols to the first-recited filtering means; means for providing to the demodulating means the phase modulated IF signal provided by the first-recited mixing means; and means in the microprocessor for adjusting the FIR filter coefficients stored in the microprocessor memory until the received phase modulated symbols correspond to the sequence of predetermined symbols provided to be first recited filtering means.
Claim 25
Dependent Claim
88 words
A system according to claim 19, wherein, within the demodulating means, the combination of the FIR digital filter and the means for converting the phae modulated symbols comprises a microprocessor for the filtering of said received digital signal and for conversion of the received phase modulated symbols, and wherein the microprocessor includes a memory for storing FIR filter coefficients for use in the filtering of said received digital signal and a memory for storing a predetermined code for use in the conversion of the received phase modulated symbols.
Claim 26
Dependent Claim
32 words
A system according to claim 10, further comprising demodulating means for converting a received phase modulated IF signal to the bit stream from which said received phase modulated IF signal was derived.
Claim 27
Dependent Claim
102 words
A system according to claim 23, wherein the demodulating means comprises means for mixing the received phase modulated IF signal with a steady-state signal of the same frequency as the steady-state signal used to produce the received phase modulated IF signal to thereby provide a received analog signal; means for converting the received analog signal into a received digital signal; means for digitally filtering the received digital signal to provide phase modulated symbols; and means for converting the received phase modulated symbols into a received bit stream corresponding to the bit stream from which the received phase modulated IF signal was derived.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-02-16 | 1990-08-18 | 1991-02-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-02-16 | 1994-08-18 | 1995-02-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-02-16 | 1998-08-18 | 1999-02-17 | $7700.00 | Window Closed / Lapsed |