Microprocessor data modem

Claim 1

A data modem comprising: a microprocessor having an associated clock, instruction memory, a memory containing data tables, and a memory for storage of operational data; a data bus for coupling the microprocessor to said memories, for coupling control and data signals to the microprocessor, and for coupling data from the microprocessor; a transmitter section having a digital subsystem provided by said microprocessor and associated data bus and memories and operative to encode data from a source into DPSK form; the transmitter section having an analog subsystem operative to convert the encoded data into an analog DPSK signal for transmission on a voice grade line; the transmitter section including: means operative to couple via the data bus a representation of data from said source to said microprocessor; digital-to-analog converter means operative in response to digital data coupled thereto by the data bus from the microprocessor to provide the analog signal; timing and interrupt control means operative to provide timing and control signals via the data bus for the microprocessor; said microprocessor being operative to provide a training sequence, to scramble data to be transmitted, to digitally synthesize the DPSK signal and to control transmitter operation; a receiver section including an analog subsystem operative to receive a DPSK signal from a voice grade line and a digital subsystem provided by the microprocessor and associated data bus and memories, and operative to convert the received analog signal into digital form and to decode the data; and said microprocessor being operative to provide coherent detection of the received signal, adaptive equalization, data recovery, descrambling of data, receiver training sequence generation and control, clock phase correction, signal quality measurement, and phase offset detection.