Analog-to-digital converter with scaling of input signal

Claim 2

In a change-redistribution successive-approximation analog-to-digital (A/D) converter having a precision voltage reference (V REF ), in which said charge-redistribution portion of said converter includes a plurality of charge storing means, to which an unknown analog input voltage may be applied whose maximum rated value is greater than said precision reference voltage (V REF ), the improvement comprising: control means including switching means coupled to said plurality of charge storing means for applying said unknown analog input voltage to selected ones of said plurality of charge storing means, during a sampling interval, and for subsequently redistributing the accumulated charge among a different number of said charge storing means for scaling the unknown analog input voltage by a factor approximately equal to the ratio of the value of the precision reference voltage to the maximum rated value of the unknown analog input voltage.

Claim 3

In the A/D converter as claimed in claim 1 wherein said charge storing means includes N capacitors, each capacitor having first and second terminals; where N is an integer greater than 2; and wherein said converter includes: a comparator means having an input and an output; means connecting the first terminal of each one of said N capacitors to said input of said comparator; and wherein said control means including switching means includes means for applying said unknown analog input voltage to said second terminal of selected ones of said N capacitors during a sampling interval, including means for, subsequent to the sampling interval, connecting the second terminal of all of said N capacitors to the same potential point for redistributing the charge from said selected ones of said N capacitors onto all of said N capacitors for producing a resultant voltage applied to the input of said comparator which is proportional to the ratio of the capacitance of said selected ones of said N capacitors in the total capacitance of said N capacitors.

Claim 4

In the analog to digital converter as claimed in claim 2 wherein said means for applying said unknown analog input voltage to said second terminal of selected ones of said N capacitors includes a programmable scaling means coupled to said second terminals of said capacitors for selectively applying said analog input voltage to said capacitor during said sampling interval.

Claim 5

In the analog to digital converter as claimed in claim 3, wherein said programmable scaling means includes settable flip-flops.

Claim 6

In the A/D converter as claimed in claim 1 wherein said comparator means includes amplifying means with a feedback switching means connected between the input and output of said amplifying means wherein said feedback switching means is turned-on during a sampling interval.

Claim 7

In the A/D converter as claimed in claim 5 wherein said feedback switching means is a complementary transistor transmission gate.

Claim 8

In the A/D converter as claimed in claim 6 wherein said means for applying said unknown analog input voltage to said second terminal of said capacitors includes complementary transistor transmission gates.

Claim 9

A charge-redistribution successive-approximation analog-to-digital (A/D) converter comprising: a reference terminal for the application thereto of a precision reference voltage (V REF ); an input terminal for the application thereto of an unknown analog input voltage; N capacitors, each capacitor having first and second terminals; where N is an integer greater than 2; a comparator means having an input and an output; means connecting the first terminal of each one of said N capacitors to said input of said comparator; and means for applying said unknown analog input voltage to said second terminal of selected ones of said N capacitors during a sampling interval, including means for, subsequent to the sampling interval, connecting the second terminal of all of said N capacitors to the same potential point for redistributing the charge from said selected ones of said N capacitors onto all of said N capacitors for producing a resultant voltage applied to the input of said comparator which is proportional to the ratio of the capacitance of said selected ones of said N capacitors to the total capacitance of said N capacitors.

Claim 10

A charge-redistribution successive-approximation analog-to-digital (A/D) converter comprising: a reference terminal for the application thereto of a precision reference voltage (V REF ); an input terminal for the application thereto of an unknown analog input voltage; N capacitors, each capacitor having first and second terminals; where N is an integer greater than 2; a comparator means having an input and an output; means connecting the first terminal of each one of said N capacitors to said input of said comparator; and means for applying said unknown analog input voltage to said second terminal of selected ones of said N capacitors during a sampling interval, including means for, subsequent to the sampling interval, connecting the second terminal of all of said N capacitors to the same potential point for redistributing the charge from said selected ones of said N capacitors onto all of said N capacitors for producing a resultant voltage applied to the input of said comparator which is proportional to the ratio of the capacitance of said selected ones of said N capacitors to the total capacitance of said N capacitors.

Claim 11

The A/D converter as claimed in claim 8 wherein said means for applying said unknown analog input voltage to said second terminal of selected ones of said N capacitors includes a programmable scaling means coupled to said second terminals of said capacitors for selectively applying said analog input voltage to said capacitors during said sampling interval.

Claim 12

The A/D converter as claimed in claim 9, wherein said programmable scaling means includes settable flip-flops.

Claim 13

The A/D converter as claimed in claim 10 wherein said means for applying said unknown analog input voltage to said second terminal of said capacitors includes complementary transistor transmission gates.