Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
197 words
A circuit arrangement for registering false release signals for a restraint system in a motor vehicle wherein the restraint system includes first release circuit means for generating a first release signal in response to an accident-related deceleration of the vehicle, said first release circuit means including a first deceleration sensor and an evaluation circuit connected to the latter; second release circuit means for responding to a predetermined threshold level of deceleration by generating a second release signal; and, actuating circuit means for actuating said restraint system in response to said first release signal only upon the occurrence of said second release signal simultaneoulsy with said first release signal; said circuit arrangement for registering false release signal comprising: monitoring circuit means connected to said evaluation circuit for ascertaining the occurrence of said first release signal in the absence of said second release signal from said second release circuit means; and, warning means responsive to the output of said monitoring circuit means for registering the presence of said first release signal in the absence of said second release signal from said second release means thereby establishing said first release signal occurring in this manner as a false release signal.
Claim 2
Dependent Claim
197 words
A circuit arrangement for registering false release signals for a restraint system in a motor vehicle wherein the restraint system includes first release circuit means for generating a first release signal in response to an accident-related deceleration of the vehicle, said first release circuit means including a first deceleration sensor and an evaluation circuit connected to the latter; second release circuit means for responding to a predetermined threshold level of deceleration by generating a second release signal; and, actuating circuit means for actuating said restraint system in response to said first release signal only upon the occurrence of said second release signal simultaneoulsy with said first release signal; said circuit arrangement for registering false release signal comprising: monitoring circuit means connected to said evaluation circuit for ascertaining the occurrence of said first release signal in the absence of said second release signal from said second release circuit means; and, warning means responsive to the output of said monitoring circuit means for registering the presence of said first release signal in the absence of said second release signal from said second release means thereby establishing said first release signal occurring in this manner as a false release signal.
Claim 3
Dependent Claim
55 words
The circuit arrangement of claim 1, comprising: timer means connected to the output of said monitoring circuit means for holding said first release signal a predetermined length of time; and, switching circuit means for switching on said warning means in response to a release signal having a duration greater than said predetermined length of time.
Claim 4
Dependent Claim
49 words
The circuit arrangement of claim 2, said timer means being a time delay circuit; and, said switching circuit means including ancillary circuit means for switching on said warning means in the simultaneous presence of said first release signal from both said monitoring circuit means and said time delay means.
Claim 5
Dependent Claim
45 words
The circuit arrangement of claim 2, said warning means comprising: a warning device for registering the presence of said false release signal; and, said switching circuit means including self-holding circuit means for switching said warning device on in the presence of said false release signal.
Claim 6
Dependent Claim
14 words
The circuit arrangement of claim 4, said self-holding circuit means being a self-holding relay.
Claim 7
Dependent Claim
13 words
The circuit arrangement of claim 4, said self-holding circuit means being thyristor means.
Claim 8
Dependent Claim
57 words
The circuit arrangement of claim 1, said warning means comprising: a warning device for registering the presence of said false release signal; and, switching means for deactivating said release circuit means and for switching on said warning device in response to said release signal in the simultaneous absence of said response from said second release circuit means.