Patent FR857523A successfully refreshed from Google Patents.
Patent US4638247A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4638247A Expired / Lapsed US ⏱️ 0.0 years remaining

Integrated circuit for converting a drive signal of three or more voltage levels to two voltage levels

Assignee: Seiko Instruments Inc
•
Filing: 1982-09-15
•
Granted: 1987-01-20
•
Expires: 2002-09-15
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An integrated circuit is operable to produce a first signal of at least three voltage levels at an output terminal thereof for driving a liquid crystal during a normal mode of operation and is operable to change the first signal to a second signal of two voltage levels for use in testing the first signal during a test mode of operation. The integrated circuit comprises a logic circuit for generating a reference signal and an effective signal to control the driving of the liquid crystal, test circuitry for producing a test signal during the test mode, a drive control circuit receptive of the reference signal and the effective signal for producing normal drive control signals in the absence of the test signal and for producing test drive control signals in response to the test signal, and a set of analogue switches responsive to the drive control signals for producing the first signal of at least three voltage levels when the test circuitry does not produce the test signal and for producing the second signal of two voltage levels when the test circuitry produces the test signal. During the test mode, the second signal of two voltage levels is applied to a conventional LSI tester incorporated in the LSI circuitry which includes the integrated circuit, and the LSI tester utilizes the two voltage levels of the second signal to test the operational state of the LSI circuitry.

Inventors

  • 👤 Takehiro Ishikawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 21:43
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/2205; G06F11/2221; G01; G01R; G01R31/00; G01R31/28; G01R31/3167; G01R31/317; G01R31/3181; G01R31/3185; G04; G04D; G04D7/00; G04D7/002; G04D7/003

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 189 words
An integrated circuit capable of producing a first signal of at least three voltage levels at an output terminal thereof for driving a liquid crystal during a normal mode of operation and capable of changing the first signal to a second signal of two voltage levels for use in testing the first signal during a test mode of operation, the integrated circuit comprising: a logic circuit for generating a reference signal and an effective signal to control the driving of a liquid crystal; testing means for producing a test signal during the test mode of operation; drive control circuit means for receiving said reference signal and said effective signal and operative to produce normal drive control signals in the absence of said test signal and operative to produce test drive control signals in response to said test signal; and analogue switch means responsive to the drive control signals for producing the said first signal of at least three voltage levels when said testing means does not produce said test signal and for producing the said second signal of two voltage levels when said testing means produces said test signal.
Claim 2
Dependent Claim 189 words
An integrated circuit capable of producing a first signal of at least three voltage levels at an output terminal thereof for driving a liquid crystal during a normal mode of operation and capable of changing the first signal to a second signal of two voltage levels for use in testing the first signal during a test mode of operation, the integrated circuit comprising: a logic circuit for generating a reference signal and an effective signal to control the driving of a liquid crystal; testing means for producing a test signal during the test mode of operation; drive control circuit means for receiving said reference signal and said effective signal and operative to produce normal drive control signals in the absence of said test signal and operative to produce test drive control signals in response to said test signal; and analogue switch means responsive to the drive control signals for producing the said first signal of at least three voltage levels when said testing means does not produce said test signal and for producing the said second signal of two voltage levels when said testing means produces said test signal.
Claim 3
Dependent Claim 17 words
An integrated circuit as claimed in claim 1; wherein said logic circuit comprises a watch logic circuit.

References Cited (Backward Citations)

US2731491A Cited
US3038121A Cited
US3895372A Cited
US3866171A Cited
US4423929A Cited
US4282594A Cited
JPS55116217A Cited
US4307392A Cited
DE3125132A1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-01-19 1990-07-21 1991-01-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-01-19 1994-07-21 1995-01-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-01-19 1998-07-21 1999-01-20 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag