US4630223A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Scanner amplitude stabilization system
Assignee: 3M Co
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Filing: 1984-03-05
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Granted: 1986-12-16
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Expires: 2004-03-05
Abstract
Abstract Circuitry for controlling the amplitude of a self-resonant scanner including a first means for measuring the time to complete a number of full cycle scanner movements, a second means for measuring the time to complete a number of movements between a first fixed point and a second fixed point in the scan path and logic means using such time measurements to determine whether the scanner amplitude is greater or less than a desired amplitude and providing digital information to produce an analog signal for controlling the scanner amplitude to reduce any difference from the desired amplitude.
Inventors
- 👤 David J. Schoon
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 16:33
CPC Classifications
G; G06; G06K; G06K15/00; G06K15/02; G06K15/12; G06K15/1204; G06K15/1219
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
127 words
Circuitry for controlling the amplitude of a self-resonant scanner operated to define a scan path including: first means for measuring the time interval for the scanner to complete a number of full cycle movements; second means for measuring the time interval for the scanner to move a number of times between a first fixed point to a second fixed point in the scan path; and logic means connected for receiving the time interval measurements from said first and second means for determining whether such time interval measurements indicate the scanner operating amplitude differs from the desired amplitude and providing digital information based on any such difference that is usable for the production of an analog signal for controlling the amplitude of the scanner to reduce such difference.
Claim 2
Dependent Claim
127 words
Circuitry for controlling the amplitude of a self-resonant scanner operated to define a scan path including: first means for measuring the time interval for the scanner to complete a number of full cycle movements; second means for measuring the time interval for the scanner to move a number of times between a first fixed point to a second fixed point in the scan path; and logic means connected for receiving the time interval measurements from said first and second means for determining whether such time interval measurements indicate the scanner operating amplitude differs from the desired amplitude and providing digital information based on any such difference that is usable for the production of an analog signal for controlling the amplitude of the scanner to reduce such difference.
Claim 3
Dependent Claim
46 words
Circuitry according to claim 1 wherein said first means includes a counter, said second means includes a counter, said first and second means having a clock that is common to each of said first and second means, said clock operatively connects to each of said counters.
Claim 4
Dependent Claim
13 words
Circuitry according to claim 1 wherein said logic circuitry is a programmed microprocessor.
Claim 5
Dependent Claim
114 words
Circuitry according to claim 1 wherein said logic means notes the time interval A, which is the time interval measured by said first means for N full cycle movements, notes the time interval B, which is the time interval for the scanner to move N+M times between a first fixed point to a second fixed point, where N and M are integers such that N/(N+M) is equal to the desired duty cycle of the scanner, provides digital information for the production of an analog signal for decreasing the amplitude of the scanner if A>B and provides digital information for the production of an analog signal for increasing the amplitude of the scanner if A<B.
Claim 6
Dependent Claim
116 words
Circuitry according to claim 1 wherein said logic means notes the time interval A, which is the time interval measured by said first means for N full cycle movements, notes the time interval B, which is the time interval for the scanner to move N+M times between a first fixed point to a second fixed point, where N and M are integers such that N/(N+M) is equal to 1 minus the desired duty cycle of the scanner, provides digital information for the production of an analog signal for increasing the amplitude of the scanner if A>B and provides digital information for the production of an analog signal for decreasing the amplitude of the scanner if A<B.
Claim 7
Dependent Claim
134 words
Circuitry according to claim 1 wherein said logic means notes the time interval A, which is the time interval measured by said first means for N full cycle movements, notes the time interval B, which is the time interval for the scanner to move N+M times between a first fixed point to a second fixed point, where N and M are integers such that (BN)/(A(N+M)) is equal to the desired duty cycle of the scanner, provides digital information for the production of an analog signal for decreasing the amplitude of the scanner if (BN)/(A(N+M)) is greater than the desired duty cycle of the scanner, and provides digital information for the production of an analog signal for increasing the amplitude of the scanner if (BN)/(A(N+M)) is less than the desired duty cycle of the scanner.
Claim 8
Dependent Claim
129 words
Circuitry according to claim 1 wherein said logic means notes the time interval A, which is the time interval measured by said second means for the scanner to move N times between a first fixed point and a second fixed point, notes the time interval B, which is the time interval measured by said first means for the scanner to move N full cycle movements, where N is an integer, computes A/B, provides digital information for production of an analog signal for increasing the amplitude of the scanner if A/B is less than the desired duty cycle of the scanner and provides digital information for production of an analog signal for decreasing the amplitude of the scanner if A/B is greater than the desired duty cycle of the scanner.
Claim 9
Dependent Claim
70 words
Circuitry according to claim 1 further including a digital register connected to said logic circuitry for receiving said digital information, a digital to analog converter connected to said digital register for providing an analog signal in response to the output of said digital register, and a drive circuit for the scanner connected to said digital to analog converter for receiving the analog signal output from said digital to analog converter.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-12-15 | 1990-06-16 | 1990-12-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-12-15 | 1994-06-16 | 1994-12-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-12-15 | 1998-06-16 | 1998-12-16 | $7700.00 | Window Closed / Lapsed |