Charge transfer device output

Claim 1

A charge transfer device comprising a semiconductor body, at a surface of which is defined a charge transport channel for storing and transporting information in the form of discrete charge packets to an output stage, which has a zone for temporarily storing and reading the charge packets and an insulated gate field effect transistor which forms a reset transistor draining a read charge packet and preparing the said zone for storing and reading a next charge packet, this transistor comprising a source region coupled to the said zone, an insulated gate connected to a clock voltage source for rendering the transistor intermittently conducting and non-conducting, and a drain region connected to means for applying a suitable drain voltage, characterized in that the said means comprise a second insulated gate field effect transistor, which is designated hereinafter as auxiliary transistor, whose gate and drain can be applied to a fixed voltage V 1 , more particularly the supply voltage, and whose source is connected to the drain region of the reset transistor and to current supply means for passing a current through the auxiliary transistor, and in that the gate of the reset transistor is connected to a clock voltage source, by means of which in the conductive state of the reset transistor, the voltage V 1 is also applied to the gate of the reset transistor.