Analog signal processing circuit

Claim 2

An analog signal processing circuit adapted for use in an integrated circuit, said processing circuit comprising: an analog signal multiplexing circuit including a plurality of input current paths, an output current path, a channel select circuit responsive to a first set of coded selection signals for selecting an input current path in accordance with the code of said first set of selection signals and for coupling said selected input current path to said output current path to permit current therebetween, and first circuit means for maintaining the selected input current path at a first predetermined potential; and a ranging circuit including an input and an output current path, said input current path of said ranging circuit being coupled to said output current path of said multiplexing circuit, a plurality of current splitters coupled in a cascaded chain having one end of said chain coupled to said input current path, each of said current splitters coupled to one and another current paths, a range select circuit responsive to a second set of coded selection signals for splitting the current of the input current path between said one and another current paths of said current splitters in a proportion as governed by the code of said second set of selection signals, and means for providing current at the output current path representative of the current through the other current paths of said current splitter, whereby the current of the input current path is ranged at the output current path in accordance with the code of the second set of selection signals.

Claim 3

The analog signal processing circuit in accordance with claim 1 wherein: the channel select circuit includes second circuit means for maintaining the unselected input current paths at a second predetermined potential, and a switching circuit for each input current path, each switching circuit operative to connect its corresponding input current path to the output current path when the corresponding input current path is at the first predetermined potential and to disconnect its corresponding input current path from the output current path when the corresponding input current path is at the second predetermined potential; and the first circuit means includes a comparator circuit means for each input current path, only the comparator circuit means of the selected input current path being activated to maintain its corresponding input current path at the first predetermined potential which operates the corresponding switching circuit to connect the selected input current path to the output current path, each comparator circuit means corresponding to the unselected input curent paths being deactivated by the second potential of the unselected input current path associated therewith.

Claim 4

The analog signal processing circuit in accordance with claim 2 wherein the second circuit means includes a transistor for each input current path, each transistor being coupled between a third predetermined potential and its corresponding input current path and operative when energized to maintain its corresponding input current path at the second predetermined potential, said plurality of transistors being energized in accordance with the code of the first set of selection signals.

Claim 5

The analog signal processing circuit in accordance with claim 3 wherein each transistor is a bipolar NPN transistor having its collector coupled to the third predetermined potential and its emitter coupled to the input current path associated therewith.

Claim 6

The analog signal processing circuit in accordance with claim 2 wherein each switching circuit includes a transistor coupled between the output current path and its corresponding input current path, each transistor being forward biased to conduct current between said output and corresponding input current path when said corresponding input path is at the first predetermined potential and reverse biased to open the circuit between said output and corresponding input current path when said corresponding input path is at the second predetermined potential.

Claim 7

The analog signal processing circuit in accordance with claim 5 wherein each switching circuit transistor is a bipolar NPN transistor, said plurality of transistors having their collectors commonly coupled to the output current path and their bases commonly coupled to the plurality of comparator circuit means, each transistor having its emitter coupled to its corresponding input current path.

Claim 8

The analog signal processing circuit in accordance with claim 2 wherein the first predetermined potential is substantially ground potential and the second predetermined potential is at a positive voltage with respect to ground potential.

Claim 9

The analog signal processing circuit in accordance with claim 1 wherein the first predetermined potential is substantially ground potential.

Claim 10

The analog signal processing circuit in accordance with claim 1 wherein each current splitter includes first and second inputs and a common output to effect two separate current paths from which current may be drawn to said common output, the division of current drawn from said separate current paths being predeterminately fixed; wherein the plurality of current splitters being cascaded by coupling the output of one to the first input of another, the output of the current splitter at one end of the cascaded chain being coupled to the input path of the ranging circuit and the first input of the current splitter at the other end of said chain being coupled to a first source; and wherein the range select circuit includes: a switch for each current splitter, each switch being operative in one position to couple together the first and second inputs of the corresponding current splitter, whereby current is caused to be drawn from the cascaded chain through both paths of the corresponding current splitter resulting in no current ranging effect thereby, and operative in another position to couple the second input of the corresponding current splitter to a second source to cause current to be drawn from said second source through the second current path of the corresponding current splitter to effect a current ranging thereby according to the predetermined current division of the separate current paths thereof; and control circuitry for operating the plurality of switches in accordance with the code of the second set of selection signals to effect an overall ranging of the current drawn from the input current path of the ranging circuit, current representative of said ranged input current being provided at the output current path of the ranging circuit.

Claim 11

The analog signal processing circuit in accordance with claim 9 wherein the ranging circuit includes three cascadedly coupled current splitters, the current splitter coupled to the input current path having a current division of one-half and one-half, the current splitter coupled between the other two having a current division of one-half and one-half, and the current splitter coupled to the first source having a current division of three-fourths and one-fourth; and wherein said control circuitry is operative to position the three switches of the corresponding current splitters to effect an overall current range from the selection of one, one-half, one-fourth and one-sixteenth in accordance with the code of the second set of selection signals.

Claim 12

The analog signal processing circuit in accordance with claim 9 wherein the ranging circuit includes a current limiter circuit disposed between the first source and the current splitter at the other end of the chain.

Claim 13

The analog signal processing circuit in accordance with claim 9 wherein the ranging circuit includes a current mirror circuit which is coupled to the first source, the first input of the current splitter at the other end of the chain, and the output current path, said current mirror circuit providing an output current at the output current path, said output current being substantially equal to the ranged input current.

Claim 14

The analog signal processing circuit in accordance with claim 9 wherein the ranging circuit includes an overrange detection circuit coupled to the output current path for detecting an overrange condition at the output current path and generating a signal indicative thereof.

Claim 15

The analog signal processing circuit in accordance with claim 13 wherein the overrange detection circuit includes a comparator circuit for generating an overrange signal when the voltage of the output current path exceeds a predetermined reference voltage.