Sound pattern discrimination system

Claim 1

A sound discrimination system for use in an environment subject to a plurality of sounds of various frequencies and combinations of frequencies, said system including in combination: first amplifier means having first and second inputs; first and second diametrically opposed sound pickup means differentially connected to the first and second inputs of said first amplifier means to permit passage of signals from said first and second sound pickup means therethrough in response to a difference in signal strength from said first and second sound pickup means greater than a predetermined amount; second amplifier means having first and second inputs; third and fourth diametrically opposed sound pickup means arranged on a line at an angle to a line between said first and second sound pickup means, said third and fourth sound pickup means being differentially connected to first and second inputs of said second amplifier means to permit passage of signals from said third and fourth sound pickup means therethrough whenever the signal strength from said third and fourth sound pickup means differs by more than a predetermined amount; first and second processing circuits connected, respectively, to the outputs of said first and second amplifier means, each of said processing circuits comprising: (a) a pluralty of means for selectively detecting and recognizing predetermined sound signals at different frequencies within the audio frequency spectrum of said particular sound pattern, each of said sound detecting and recognizing means producing an output signal in response to such detection and recognition of said second sound signal; (b) control means for producing an output control signal for said system in response to receipt of a signal on the input thereof; (c) a plurality of time delay circuit means each coupled with the output of a different corresponding one of said detecting and recognizing means for producing an enable signal ater a predetermined time delay, each of said time delay circuit means coupled with the next one of said time delay circuit means in the sequence for producing an enable signal thereto in a predetermined sequence, with the output of the last time delay circuit means coupled with said input of said control means; and (d) means interconnecting said control means in each of said channels with one another for preventing operation of said control means from said second channel when said first channel control means is operated and vice-versa.