Patent US4623802A successfully refreshed from Google Patents.
US4623802A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multiple-stage gate network having independent reference voltage sources
Assignee: Fairchild Semiconductor Corp
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Filing: 1984-05-17
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Granted: 1986-11-18
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Expires: 2004-05-17
Abstract
Abstract A circuit technique for eliminating history-dependent skew and distortion of signals as they propagate through multiple gate stages in critical timing paths. It has been discovered that spurious effects can be attributed to signal coupling between stages, and that such coupling may be reduced by providing separate threshold voltage supplies for the critical gates. Each of the first and second gate stages comprises first and second transistors having their respective emitters coupled to a common circuit point, a current source coupled to the common circuit point to provide current flow through the transistors, with the relative current flow through said transistors being determined by the relative voltage levels at the respective bases. The output signal is taken from the collector of one of the transistors. First and second threshold voltage sources are coupled to the respective bases of the second transistors of the first and second gate stages. The threshold voltage sources are isolated from one another such that current drawn from either results in substantially no change in the voltage delivered by the other. This circuit technique has applicability to configurations where the first and second gate stages are cascaded and to configurations where the gate stages are parallel stages in different branches of the signal path.
Inventors
- 👤 Ronald L. Cline
- 👤 John G. Campbell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 12:25
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/003; H03K19/00369; H03K19/00376
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
165 words
In a circuit having first and second gate stages, each of said gate stages having a singlesided signal input terminal, a threshold voltage input terminal, and a signal output terminal, the signal level at said signal output terminal being determined by the signal level at said signal input terminal relative to the level at said threshold input terminal, the improvement comprising: first and second threshold voltage sources for providing the same nominal threshold voltage, each having a voltage output terminal at which the nominal threshold voltage is provided, the voltage output terminals of said first and second voltage sources being coupled to said threshold input terminals of said first and second gate stages, respectively; wherein said first and second threshold voltage sources are isolated from one another such that current drawn from the voltage output terminal of either one of said threshold voltage sources results in substantially no change in the level at the voltage output terminal of the other of said threshold voltage sources.
Claim 2
Dependent Claim
165 words
In a circuit having first and second gate stages, each of said gate stages having a singlesided signal input terminal, a threshold voltage input terminal, and a signal output terminal, the signal level at said signal output terminal being determined by the signal level at said signal input terminal relative to the level at said threshold input terminal, the improvement comprising: first and second threshold voltage sources for providing the same nominal threshold voltage, each having a voltage output terminal at which the nominal threshold voltage is provided, the voltage output terminals of said first and second voltage sources being coupled to said threshold input terminals of said first and second gate stages, respectively; wherein said first and second threshold voltage sources are isolated from one another such that current drawn from the voltage output terminal of either one of said threshold voltage sources results in substantially no change in the level at the voltage output terminal of the other of said threshold voltage sources.
Claim 3
Dependent Claim
36 words
The invention of claim 1 wherein said first and second gate stages are cascaded with the signal output terminal of said first gate stage being coupled to the signal input terminal of said second gate stage.
Claim 4
Dependent Claim
26 words
The invention of claim 1 wherein said signal input terminal of said first and second gate stages are coupled to different branches of a signal path.
Claim 5
Dependent Claim
15 words
The invention of claim 1 wherein said nominal threshold voltage is a nominally fixed voltage.
Claim 6
Dependent Claim
15 words
The invention of claim 1 wherein said nominal threshold voltage is a controlled variable voltage.
Claim 7
Dependent Claim
232 words
In a circuit having cascaded first and second gate stages, each of said gate stages having first and second transistors having their respective emitters coupled to a common circuit point, a current source coupled to said common circuit point to provide current flow through said transistors, the relative current flow through said transistors being determined by the relative voltage levels at the respective bases, and signal output terminal means coupled to the collector of one of said transistors to provide a voltage change when current is steered from one of said transistors to the other, the base of the first transistor of said first gate stage having an input signal communicated thereto, the base of the first transistor of said second gate stage having signals from the output terminal means of said first gate stage communicated thereto, the improvement comprising: first and second threshold voltage sources having respective voltage output terminals coupled to the bases of the second transistors of said first and second gate stages, said first and second threshold voltage sources providing nominally equal voltages at said voltage output terminals; wherein said first and second threshold voltage sources are isolated from one another such that current drawn from the voltage output terminal of either of said threshold voltage sources results in substantially no change in the voltage at the voltage output terminal of the other of said threshold voltage sources.
Claim 8
Dependent Claim
232 words
In a circuit having cascaded first and second gate stages, each of said gate stages having first and second transistors having their respective emitters coupled to a common circuit point, a current source coupled to said common circuit point to provide current flow through said transistors, the relative current flow through said transistors being determined by the relative voltage levels at the respective bases, and signal output terminal means coupled to the collector of one of said transistors to provide a voltage change when current is steered from one of said transistors to the other, the base of the first transistor of said first gate stage having an input signal communicated thereto, the base of the first transistor of said second gate stage having signals from the output terminal means of said first gate stage communicated thereto, the improvement comprising: first and second threshold voltage sources having respective voltage output terminals coupled to the bases of the second transistors of said first and second gate stages, said first and second threshold voltage sources providing nominally equal voltages at said voltage output terminals; wherein said first and second threshold voltage sources are isolated from one another such that current drawn from the voltage output terminal of either of said threshold voltage sources results in substantially no change in the voltage at the voltage output terminal of the other of said threshold voltage sources.
Claim 9
Dependent Claim
32 words
The invention of claim 6 wherein said output terminal means of a given one of said gate stages is coupled to the collector of said second transistor in said given gate stage.
Claim 10
Dependent Claim
17 words
The invention of claim 6 wherein said first and second threshold voltage sources provide nominally fixed voltages.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-11-17 | 1990-05-19 | 1990-11-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-11-17 | 1994-05-19 | 1994-11-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-11-17 | 1998-05-19 | 1998-11-18 | $7700.00 | Window Closed / Lapsed |