Method and apparatus for analog-to-digital conversion

Claim 2

An analog-to-digital converting method comprising the steps of: actuating a processing circuit to transmit a start signal to a switch to thereby render the switch conductive; applying an analog voltage of input signal to a capacitor via the switch so as to electrically charge the capacitor until a value of charging voltage thereof reaches a specified value corresponding to a level of the input signal; thereafter opening the switch by the start signal so as to cause the capacitor to discharge with a constant current; leading out a level discriminating signal when a voltage of the capacitor decreases to a predetermined level in the course of discharging; generating a stop signal by a logical operation of the start signal and the level discriminating signal; and actuating the processing circuit to calculate a digital value corresponding to a time period from the time that the switch is opened to the time that the stop signal is generated so as to thereafter move to a subsequent processing operation.

Claim 3

An analog-to-digital converting method comprising the steps of: actuating a processing circuit to transmit a start signal to a switch to thereby render the switch conductive whereby a capacitor is electrically discharged; thereafter opening the switch by the start signal so as to cause the capacitor to discharge with a constant current; leading out a level discriminating signal when a voltage of the capacitor rises up to a level of an analog input signal in the course of charging; generating a stop signal by a logical operation of the start signal and the level discriminating signal; and actuating the processing circuit to calculate a digital value corresponding to a time period from the time that the switch is opened to the time that the stop signal is generated so as to thereafter move to a subsequent processing operation.

Claim 4

An analog-to-digital converting method comprising the steps of: actuating a processing circuit to transmit a start signal to a switch to thereby render the switch conductive whereby a capacitor is electrically discharged; thereafter opening the switch by the start signal so as to cause the capacitor to discharge with a constant current; leading out a level discriminating signal when a voltage of the capacitor rises up to a level of an analog input signal in the course of charging; generating a stop signal by a logical operation of the start signal and the level discriminating signal; and actuating the processing circuit to calculate a digital value corresponding to a time period from the time that the switch is opened to the time that the stop signal is generated so as to thereafter move to a subsequent processing operation.

Claim 5

An analog-to-digital converting method as claimed in claim 1, wherein the stop signal is generated by delaying a signal resulted from the logical operation.

Claim 6

An analog-to-digital converting method as claimed in claim 2, wherein the stop signal is generated by delaying a signal resulted from the logical operation.

Claim 7

An analog-to-digital converter comprising; input means for receiving an analog input signal; a power source superposing a DC voltage on the analog input signal from the input means in series; a switch conducting/stopping an output from the power source responsive to a start signal received by the switch; a capacitor intergrating the output from the switch; a constant current source causing the capacitor to discharge with a predetermined constant current; means for setting a discriminating level; level discriminating means having one input terminal thereof applied to a voltage of the capacitor and the other input terminal applied to a voltage of a discriminating level from the discriminating level setting means and leading out such a level discriminating signal as to have a predetermined logical value when discharging voltage of the capacitor goes below the discriminating level; logical operation means for performing a logical operation responsive to the start signal and the level discriminating signal and leading out the stop signal when the switch is opened by the start signal and the level discriminating signal has the predetermined logical value; and a processing circuit leading out the start signal, the signal rendering the switch conductive longer than the time required for the voltage of the capacitor to reach a maximum level corresponding to the input signal, and calculating responsive to the stop signal a digital value corresponding to a time period from the time that the switch is opened to the time that the stop signal is received by the processing circuit so as to thereafter move to a subsequent processing operation.

Claim 8

An analog-to-digital converter comprising; input means for receiving an analog input signal; a power source superposing a DC voltage on the analog input signal from the input means in series; a switch conducting/stopping an output from the power source responsive to a start signal received by the switch; a capacitor intergrating the output from the switch; a constant current source causing the capacitor to discharge with a predetermined constant current; means for setting a discriminating level; level discriminating means having one input terminal thereof applied to a voltage of the capacitor and the other input terminal applied to a voltage of a discriminating level from the discriminating level setting means and leading out such a level discriminating signal as to have a predetermined logical value when discharging voltage of the capacitor goes below the discriminating level; logical operation means for performing a logical operation responsive to the start signal and the level discriminating signal and leading out the stop signal when the switch is opened by the start signal and the level discriminating signal has the predetermined logical value; and a processing circuit leading out the start signal, the signal rendering the switch conductive longer than the time required for the voltage of the capacitor to reach a maximum level corresponding to the input signal, and calculating responsive to the stop signal a digital value corresponding to a time period from the time that the switch is opened to the time that the stop signal is received by the processing circuit so as to thereafter move to a subsequent processing operation.

Claim 9

An analog-to-digital converter as claimed in claim 5, wherein there is provided a delay circuit for leading out the stop signal by delaying an output from the logical operation means.

Claim 10

An analog-to-digital converter as claimed in claim 5, wherein the input means is a multiplexer adapted to selectively lead out a plurality of analog input signals responsive to a channel selection signal from the processing circuit and the processing circuit leads out the channel selection signal for selecting the analog input signal after receiving the stop signal.

Claim 11

An analog-to-digital converter as claimed in claim 5, wherein the logical operation means is an AND gate.

Claim 12

An analog-to-digital converter comprising; input means for receiving an analog input signal; a power source superposing a DC voltage on the analog input signal from the input means in series; a capacitor for integrating; a switch causing capacitor to discharge responsive to a start signal received by the switch; a constant current source electrically charging the capacitor with a predetermined constant current; means for setting a discriminating level; level discriminating means having one input terminal thereof given an output by the power source and the other input terminal applied to a voltage of the capacitor and leading out such a level discriminating signal as to have a predetermined logical value when charging voltage of the capacitor exceeds the voltage of the one input terminal; logical operation means for performing a logical operation responsive to the start signal and the level discriminating signal and leading out the stop signal when the switch is opened by the start signal and the level discriminating signal has the predetermined logical value; and a processing circuit leading out the start signal, and calculating responsive to the stop signal a digital value corresponding to a time period from the time that the switch is opened to the time that the stop signal is received by the processing circuit so as to thereafter move to a subsequent processing operation.

Claim 13

An analog-to-digital converter comprising; input means for receiving an analog input signal; a power source superposing a DC voltage on the analog input signal from the input means in series; a capacitor for integrating; a switch causing capacitor to discharge responsive to a start signal received by the switch; a constant current source electrically charging the capacitor with a predetermined constant current; means for setting a discriminating level; level discriminating means having one input terminal thereof given an output by the power source and the other input terminal applied to a voltage of the capacitor and leading out such a level discriminating signal as to have a predetermined logical value when charging voltage of the capacitor exceeds the voltage of the one input terminal; logical operation means for performing a logical operation responsive to the start signal and the level discriminating signal and leading out the stop signal when the switch is opened by the start signal and the level discriminating signal has the predetermined logical value; and a processing circuit leading out the start signal, and calculating responsive to the stop signal a digital value corresponding to a time period from the time that the switch is opened to the time that the stop signal is received by the processing circuit so as to thereafter move to a subsequent processing operation.

Claim 14

An analog-to-digital converter is claimed in claim 9, wherein there is provided a delay circuit for leading out the stop signal be delaying an output from the logical operation means.

Claim 15

An analog-to-digital converter as claimed in claim 9, wherein the input means is a multiplexer adapted to selectively lead out a plurality of analog input signals responsive to a channel selection signal from the processing circuit and the processing circuit leads out the channel selection signal for selecting the analog input signal after receiving the stop signal.

Claim 16

An analog-to-digital converter as claimed in claim 9, wherein the logical operation means is an AND gate.