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US4621254A
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Apparatus and methods for analogue-to-digital conversion
Assignee: Texas Instruments Tucson Corp
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Filing: 1984-07-23
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Granted: 1986-11-04
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Expires: 2004-07-23
Abstract
Abstract In view of the limited speed times accuracy product of A-to-D and D-to-A converters, a required digital accuracy or sufficiently smooth analogue waveform cannot always be obtained. The present invention is useful in enhancing available converters. In the A-to-D version a stepped interpolation waveform obtained from a generator 13 is added to samples of an analogue waveform obtained from a sample-and-hold circuit 11 at a frequency 2f B (where f B is the bandwidth of the input signal). The resultant signal is applied to an n-bit A-to-D converter 15 operating at 2 m times 2f B and the converter output is averaged using an accumulator 16 reset at 2f B . The accumulator output is a higher accuracy signal since it has m+n bits. An analogous technique is described for D-to-A conversion.
Inventors
- 👤 R. Allan Belcher
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 19:33
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/66; H03M1/12; H03M1/20; H03M1/202
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
205 words
An n+m bit analog-to-digital converter circuit including an analog input and n+m output bits, n and m being integers, the analog-to-digital converter circuit comprising in combination: (a) a sample and hold circuit having an input terminal receiving an analog input signal, a control input terminal, and an output terminal, and means for applying a first sampling signal having a first frequency to the control input terminal to cause the sample and hold circuit to produce a sampled analog signal on the output terminal; (b) an interpolation signal generating circuit producing a periodic interpolation signal having a second frequency that is 2 m times the first frequency; (c) a combining circuit combining the interpolation signal and the sampled analog signal to produce a combined signal having 2 m steps in each period of the sampling signal; (d) an n-bit analog-to-digital converter receiving the combined signal and converting it to n-bit digital numbers in response to a conversion control signal of the second frequency; and (e) digital time averaging circuit means for accumulating the n-bit digital numbers produced during each period of the first frequency and averaging the accumulated total thereof over that period to produce an n+m bit digital number representative of the analog input signal.
Claim 2
Dependent Claim
205 words
An n+m bit analog-to-digital converter circuit including an analog input and n+m output bits, n and m being integers, the analog-to-digital converter circuit comprising in combination: (a) a sample and hold circuit having an input terminal receiving an analog input signal, a control input terminal, and an output terminal, and means for applying a first sampling signal having a first frequency to the control input terminal to cause the sample and hold circuit to produce a sampled analog signal on the output terminal; (b) an interpolation signal generating circuit producing a periodic interpolation signal having a second frequency that is 2 m times the first frequency; (c) a combining circuit combining the interpolation signal and the sampled analog signal to produce a combined signal having 2 m steps in each period of the sampling signal; (d) an n-bit analog-to-digital converter receiving the combined signal and converting it to n-bit digital numbers in response to a conversion control signal of the second frequency; and (e) digital time averaging circuit means for accumulating the n-bit digital numbers produced during each period of the first frequency and averaging the accumulated total thereof over that period to produce an n+m bit digital number representative of the analog input signal.
Claim 3
Dependent Claim
41 words
The n+m bit analog-to-digital converter circuit of claim 1 including an n+m bit latching circuit receiving the n+m bit digital number and latching it, and means for sampling the n+m bit latching circuit at a rate equal to the first frequency.
Claim 4
Dependent Claim
30 words
The n+m bit analog-to-digital converter circuit of claim 1 wherein the amplitude of the combined signal is less than or equal to the quantization interval of the n-bit analog-to-digital converter.
Claim 5
Dependent Claim
46 words
The n+m bit analog-to-digital converter circuit of claim 1 wherein the amplitude of the combined signal is equal to a predetermined value that is greater than the quantization interval of the n-bit analog-to-digital converter in order to improve the accuracy of the n+m bit digital number.
Claim 6
Dependent Claim
32 words
The n+m bit analog-to-digital converter circuit of claim 4 wherein the predetermined value is ##EQU12## times the quantization interval of the n-bit analog-to-digital converter, wherein p is equal to 2 m .
Claim 7
Dependent Claim
17 words
The n+m bit analog-to-digital converter circuit of claim 1 wherein the combining circuit includes a summing circuit.
Claim 8
Dependent Claim
26 words
The n+m bit analog-to-digital converter circuit of claim 1 wherein the digital time averaging circuit means includes an n+m bit latch circuit and an m-bit counter.
Claim 9
Dependent Claim
35 words
The n+m bit analog-to-digital converter circuit of claim 1 wherein the digital time averaging circuit means includes an accumulator and means for resetting the accumulator at the end of each period of the first frequency.
Claim 10
Dependent Claim
70 words
The n+m bit analog-to-digital converter circuit of claim 1 wherein the combined signal has a stepped waveform and a repetition frequency equal to the first frequency, each step having a duration equal to the period of the second frequency and a magnitude equal to at least (2 m-1 )/2 m times amplitude of the combined signal divided by the number of step transitions in each period of the first frequency.
Claim 11
Independent Claim
151 words
A method of converting an analog signal to a digital number, the method comprising the steps of: (a) sampling a level of the analog signal at a first frequency and holding each sampled level unitl a next sampled level is obtained; (b) combining each sampled and held level with an interpolation signal having a second frequency that is 2 m times the first frequency to produce a combined signal that has 2 m steps during each period of the first frequency, m being an integer; (c) operating an N-bit analog-to-digital converter to convert the level of each of the 2 m steps to 2 m+n bit digital numbers; (d) time-averaging the 2 m+n bit digital numbers in each period of the first frequency to produce an n+m bit digital number for each period of the first frequency; and (e) repeating steps (a) through (d) for successive periods of the first frequency.
Claim 12
Independent Claim
151 words
A method of converting an analog signal to a digital number, the method comprising the steps of: (a) sampling a level of the analog signal at a first frequency and holding each sampled level unitl a next sampled level is obtained; (b) combining each sampled and held level with an interpolation signal having a second frequency that is 2 m times the first frequency to produce a combined signal that has 2 m steps during each period of the first frequency, m being an integer; (c) operating an N-bit analog-to-digital converter to convert the level of each of the 2 m steps to 2 m+n bit digital numbers; (d) time-averaging the 2 m+n bit digital numbers in each period of the first frequency to produce an n+m bit digital number for each period of the first frequency; and (e) repeating steps (a) through (d) for successive periods of the first frequency.
Claim 13
Dependent Claim
45 words
The method of claim 10 including causing the peak-to-peak amplitude of the combined signal to be equal to a predetermined value that is greater than the quantization interval of the n-bit analog-to-digital converter in order to improve the accuracy of the n+m bit digital number.
Claim 14
Dependent Claim
29 words
The method of claim 11 wherein the predetermined value is equal to ##EQU13## times the quantization interval of n-bit analog-to-digital converter, where p is equal to 2 m .
Claim 15
Dependent Claim
20 words
The method of claim 11 wherein the predetermined value is less than the quantization interval of the n-bit analog-to-digital converter.
Claim 16
Independent Claim
131 words
A method of converting an analog signal to a digital signal, the method comprising the steps of: (a) sampling a level of the analog signal at a first frequency and holding each sampled level until a next sampled level is obtained; (b) combining each sampled level with an interpolation signal having a second frequency that is greater than the first frequency to produce a combined signal that has more than one level during the period of the sampled level; (c) operating an n-bit analog-to-digital converter to convert the levels of the combined signal to a plurality of n-bit digital numbers, respectively; and (d) time-averaging the n-bit digital numbers produced during each period of the first frequency over that period to produce a digital number having a resolution greater than n bits.
Claim 17
Independent Claim
131 words
A method of converting an analog signal to a digital signal, the method comprising the steps of: (a) sampling a level of the analog signal at a first frequency and holding each sampled level until a next sampled level is obtained; (b) combining each sampled level with an interpolation signal having a second frequency that is greater than the first frequency to produce a combined signal that has more than one level during the period of the sampled level; (c) operating an n-bit analog-to-digital converter to convert the levels of the combined signal to a plurality of n-bit digital numbers, respectively; and (d) time-averaging the n-bit digital numbers produced during each period of the first frequency over that period to produce a digital number having a resolution greater than n bits.
Claim 18
Dependent Claim
135 words
A circuit for converting an analog signal to a digital number, comprising in combination: (a) means for sampling levels of the analog signal at a first frequency and holding each sampled level until the next sampled level is obtained; (b) means for combining each sampled level with an interpolation signal having a second frequency that is greater than the first frequency to produce a combined signal that has more than one level during the period of the sampled level; (c) means for operating an n-bit analog-to-digital converter to convert the levels of the combined signal to a plurality of n-bit digital numbers, respectively; and (d) means for time-averaging the n-bit digital numbers produced during each period of the first frequency over that period to produce a digital number having a resolution greater than n bits.
Claim 19
Dependent Claim
135 words
A circuit for converting an analog signal to a digital number, comprising in combination: (a) means for sampling levels of the analog signal at a first frequency and holding each sampled level until the next sampled level is obtained; (b) means for combining each sampled level with an interpolation signal having a second frequency that is greater than the first frequency to produce a combined signal that has more than one level during the period of the sampled level; (c) means for operating an n-bit analog-to-digital converter to convert the levels of the combined signal to a plurality of n-bit digital numbers, respectively; and (d) means for time-averaging the n-bit digital numbers produced during each period of the first frequency over that period to produce a digital number having a resolution greater than n bits.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-11-03 | 1990-05-05 | 1990-11-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-11-03 | 1994-05-05 | 1994-11-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-11-03 | 1998-05-05 | 1998-11-04 | $7700.00 | Window Closed / Lapsed |