US4618810A — Variable speed AC motor control system

Claim 1

Independent Claim 299 words

Apparatus for controlling the speed of an AC motor which is powered by a multi-phase AC input, said apparatus comprising: a plurality of bridge rectifier SCR means respectively arranged to receive the input phases of the AC input and to supply a DC output in response thereto; a plurality of inverter SCR means arranged in auxiliary commutated inverter configuration for converting said DC output into an AC output having a frequency proportional to said DC output, said inverter SCR means including a connecting means for supplying said AC output to the AC motor; and control means for generating bridge rectifier SCR conduction and sequencing data, said control means including a timing means for generating zero-crossover signals which track the line-to-neutral zero-crossover points of each phase in the AC input, a first computing means connected to said timing means for generating bridge rectifier SCR sequencing data which serves to identify the particular bridge rectifier SCR means in said plurality of bridge rectifier SCR means associated with each half cycle of each AC input phase in advance of gating said particular one of said bridge rectifier SRC means into conduction and a second computing means connected to said timing means for generating bridge rectifier SCR conduction data for each half cycle of each AC input phase in advance of the first line-to-line zero-crossover point for that half cycle, said bridge rectifier SCR conduction data serving to specify the conduction point in each half cycle of each AC input phase at which particular bridge rectifier SCR means associated with that half cycle is gate into conduction, said control means also including a bridge rectifier gating means connected to said timing means for gating the bridge rectifier SCR means on and off in accordance with said bridge rectifier SCR conduction and sequencing data.

Claim 2

Dependent Claim 299 words

Apparatus for controlling the speed of an AC motor which is powered by a multi-phase AC input, said apparatus comprising: a plurality of bridge rectifier SCR means respectively arranged to receive the input phases of the AC input and to supply a DC output in response thereto; a plurality of inverter SCR means arranged in auxiliary commutated inverter configuration for converting said DC output into an AC output having a frequency proportional to said DC output, said inverter SCR means including a connecting means for supplying said AC output to the AC motor; and control means for generating bridge rectifier SCR conduction and sequencing data, said control means including a timing means for generating zero-crossover signals which track the line-to-neutral zero-crossover points of each phase in the AC input, a first computing means connected to said timing means for generating bridge rectifier SCR sequencing data which serves to identify the particular bridge rectifier SCR means in said plurality of bridge rectifier SCR means associated with each half cycle of each AC input phase in advance of gating said particular one of said bridge rectifier SRC means into conduction and a second computing means connected to said timing means for generating bridge rectifier SCR conduction data for each half cycle of each AC input phase in advance of the first line-to-line zero-crossover point for that half cycle, said bridge rectifier SCR conduction data serving to specify the conduction point in each half cycle of each AC input phase at which particular bridge rectifier SCR means associated with that half cycle is gate into conduction, said control means also including a bridge rectifier gating means connected to said timing means for gating the bridge rectifier SCR means on and off in accordance with said bridge rectifier SCR conduction and sequencing data.

Claim 3

Dependent Claim 80 words

An apparatus as set forth in claim 1, wherein said timing means includes a detection means for detecting one of the two line-of-neutral zero-crossover points of a selected phase in the AC input and for generating a zero-crossover pulse in response thereto, said timing means also including a pseudo signal generator means connected to said detection means for generating a series of pseudo zero-crossover pluses which represent the line-to-neutral zero-crossover points for all of the phases in the AC input.

Claim 4

Dependent Claim 42 words

An apparatus as set forth in claim 2, wherein said timing means includes a synchronization means connected to receive said zero-crossover pulse and said series of pseudo zero-crossover pulses for periodically synchronizing said series of pseudo zero-crossover pulses with said zero-crossover pulse.

Claim 5

Dependent Claim 69 words

An apparatus as set forth in claim 2, wherein the AC input is a three phase input and said detection means of said timing means includes a transformer means connected across two of the three phases of the AC input, said transformer means having a circuit means for outputting a transformer signal in phase with the line-to-line waveform of said two phases across which said transformer means is connected.

Claim 6

Dependent Claim 31 words

Apparatus as set forth in claim 4, wherein said transformer means includes a lag filter means connected to said circuit means for introducing a lag into phase of said transformer signal.

Claim 7

Dependent Claim 100 words

Apparatus as set forth in claim 2, wherein the AC input is a three phase input and said timing means includes a clock means for generating clock signals at first intervals, said pseudo signal generator means of said timing means having a counting means connected to receive said clock signals and said zero-crossover pulse for dividing the period between successive zero-crossover pulses into second intervals equal in duration to one of said first intervals multiplied by six and for maintaining a count of the number of said second intervals occurring during the period between sucessive ones of said zero-crossover pulses.

Claim 8

Dependent Claim 47 words

Apparatus as set forth in claim 6, wherein said pseudo signal generator means includes a pseudo signal timer which is loaded with said count obtained from said counting means and driven by said clock signals from said clock means to generate said series of pseudo zero-crossover pulses.

Claim 9

Dependent Claim 89 words

Apparatus as set forth in claim 2, wherein said timing means includes a plurality of SCR firing timers which receive said bridge rectifier SCR conduction data from said second computing means, said zero-crossover pulses from said detection means and said series of pseudo zero-crossover pulses from said pseudo signal generator means to initiate a count operation for an interval of time defined by said bridge rectifier SCR conduction data, after which said SCR firing timers respectively cause the gating of the bridge rectifier SCR means associated therewith into conduction.

Claim 10

Dependent Claim 121 words

Apparatus as set forth in claim 2, wherein said control means includes a means for establishing a speed signal indicative of the desired speed of the AC motor, a sensor means for determining the magnitude of the DC output from said bridge rectifier SCR means, and a summing means connected to receive said speed signal and said sensor signal for generating a control signal as a function of the difference in the magnitude between said speed signal and said sensor signal, said second computing means of said control means including a sampling means connected to receive said control signal for digitizing and sampling said control signal to derive a cumulative value for use in generating said bridge rectifier SCR conduction data.

Claim 11

Dependent Claim 93 words

Apparatus as set forth in claim 1, wherein said control means also generates inverter SCR conduction and sequencing data in advance of each polarity shift in the AC output from said inverter SCR means, said control means further including an inverter gating means for gating the inverter SCR means on and off in accordance with said inverter SCR conduction and sequencing data to provide a constant volts/Hertz ratio between the voltage level of said AC output from said inverter SCR means and said frequency of said AC output from said inverter SCR means.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1989-10-20	1990-04-21	1990-10-21	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1993-10-20	1994-04-21	1994-10-21	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1997-10-20	1998-04-21	1998-10-21	$7700.00	Window Closed / Lapsed

Variable speed AC motor control system

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