US4614666A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semi-conductor device with sandwich passivation coating
Assignee: Samsung Semiconductor and Telecomunications Co Ltd
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Filing: 1985-02-07
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Granted: 1986-09-30
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Expires: 2005-02-07
Abstract
Abstract Improved silicon semi-conductor device and process includes three layer sandwich passivation coating. The sandwich coating comprises first, a thin silica layer, preferably produced by oxidizing a silicon surface to the minimum thickness necessary to prevent interdiffusion of an overlying nitride layer with the silicon subsurface. The second layer of the sandwich construction is nitride and the third layer is a thicker layer of silica, preferably produced by plasma glass deposition which, together with the inner silica layer provides preselected electrical characteristics required of the composite barrier or passivation coating. This invention reduces manufacturing defects produced in conventional two layer passivation coatings, including a thicker silica inner layer, due to undercutting of the thicker silica inner layer upon etching to form terminal areas. Such undercutting is avoided by the thin silica inner layer in the present invention.
Inventors
- 👤 Timothy M. Lindenfelser
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 13:07
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/074; H10W20/075; H10W20/40; H10W20/45; H10W20/48; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6302; H10P14/6304; H10P14/6306; H10P14/6308; H10P14/6309; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/6336; H10P14/66; H10P14/668; H10P14/6681; H10P14/6682; H10P14/69; H10P14/692; H10P14/6921; H10P14/69215
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
172 words
In a method of making a semiconductor device comprising (1) selecting a silicon base and then forming, on the surface thereof at least one functional semi-conductor area separated from surrounding areas by an isolation barrier, (2) forming a passivation coating thereon and etching said passivation coating to form contact areas at preselected locations therein and (3) depositing metal in said contact area and in a preselected pattern over said passivation coating to form at least one conductive lead forming an electrical path from one of said contact areas, the improvement comprising forming said passivation layer by (a) forming a thin silica layer of 300-500 Å thickness on the surface of said device, (b) forming a nitride layer overlying said thin silica layer and (c) forming a second silica layer of 2400-3000 Å thickness over said nitride layer; the thickness of said thin silica layer and the characteristics of said etching process adapted to substantially eliminate the adverse effects of undercut of said nitride layer by excessive etching of said thin silica layer.
Claim 2
Dependent Claim
172 words
In a method of making a semiconductor device comprising (1) selecting a silicon base and then forming, on the surface thereof at least one functional semi-conductor area separated from surrounding areas by an isolation barrier, (2) forming a passivation coating thereon and etching said passivation coating to form contact areas at preselected locations therein and (3) depositing metal in said contact area and in a preselected pattern over said passivation coating to form at least one conductive lead forming an electrical path from one of said contact areas, the improvement comprising forming said passivation layer by (a) forming a thin silica layer of 300-500 Å thickness on the surface of said device, (b) forming a nitride layer overlying said thin silica layer and (c) forming a second silica layer of 2400-3000 Å thickness over said nitride layer; the thickness of said thin silica layer and the characteristics of said etching process adapted to substantially eliminate the adverse effects of undercut of said nitride layer by excessive etching of said thin silica layer.
Claim 3
Independent Claim
147 words
A method of selectively passivating and electrically connecting preselected portions of a silicon semi-conductor device surface having thereon a functional semi-conductor area and an isolation barrier surrounding said area, said method comprising (a) covering said surface with a composite passivation coating consisting of a first thin layer of silica of 300-500 Å thickness, a second layer of nitride, and a third layer of silica of 2400-3000 Å thickness, chemically etching said composite passivation coating selectively to remove the portion of said coating covering said preselected portions and depositing metal (1) over said preselected portions and (2) over said composite layer in a conductive path extending from at least one of said portions; the thickness of said thin silica layer and the characteristics of said etching process adapted to substantially eliminate the adverse effects of undercut of said nitride layer by excessive etching of said thin silica layer.
Claim 4
Independent Claim
147 words
A method of selectively passivating and electrically connecting preselected portions of a silicon semi-conductor device surface having thereon a functional semi-conductor area and an isolation barrier surrounding said area, said method comprising (a) covering said surface with a composite passivation coating consisting of a first thin layer of silica of 300-500 Å thickness, a second layer of nitride, and a third layer of silica of 2400-3000 Å thickness, chemically etching said composite passivation coating selectively to remove the portion of said coating covering said preselected portions and depositing metal (1) over said preselected portions and (2) over said composite layer in a conductive path extending from at least one of said portions; the thickness of said thin silica layer and the characteristics of said etching process adapted to substantially eliminate the adverse effects of undercut of said nitride layer by excessive etching of said thin silica layer.
Claim 5
Dependent Claim
46 words
A method, as recited in claim 2, wherein said first layer of silica is formed by oxidizing said silicon surface and said third layer, of silica, is formed by plasma deposition to a depth sufficient to provide, in combination with said first layer, preselected electrical characteristics.
Claim 6
Dependent Claim
28 words
A method, as recited in claim 2, wherein prior to said metallic deposition, at least one of said portions is exposed to a high energy emitter dopant source.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1989-09-29 | 1990-03-31 | 1990-09-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-09-29 | 1994-03-31 | 1994-09-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-09-29 | 1998-03-31 | 1998-09-30 | $7700.00 | Window Closed / Lapsed |