US4613856A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Character and video mode control circuit
Assignee: Tektronix Inc
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Filing: 1983-04-04
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Granted: 1986-09-23
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Expires: 2003-04-04
Abstract
Abstract An electrical circuit is described that requires a reduced number of data bits for character-address and video-mode information by using a predetermined bit combination of the video-mode information as part of the character-address information. Character-address and video-mode information is output from a random access memory (RAM) to a character read only memory (ROM) and a video-mode detection circuit that produces outputs to enable video-mode circuits in the video control circuitry. One output of the video-mode detection circuit is coupled to an address input of the character ROM that has characters divided into two character sets. A predetermined bit combination of the video-mode information produces an output from the video-mode detection circuit that selects one of the character sets while the other bit combinations produce an output from the detection circuit that selects the other character set. In this way, character-address and video-mode information having n data bits can produce character and video-mode outputs that normally require n+1 data bits.
Inventors
- 👤 Daniel C. Olin
- 👤 Russell Y. Anderson
- 👤 Steven C. DenBeste
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 15:31
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/22; G09G5/222
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
139 words
An electrical circuit comprising: means for storing a plurality of sets of electrical patterns, each of said electrical patterns representative of character information and each set of electrical patterns defining a corresponding character set, said storing means coupled to receive a first portion of a coded electrical signal and at least one control signal to produce an output electrical signal representative of character information; and means for detecting a second portion of said coded electrical signal to produce said at least one control signal coupled to said storing means, said at least one control signal selecting one of said sets of electrical patterns, one of said electrical patterns within said selected one of said sets of electrical patterns being selected by said first portion of said coded electrical signal, and to produce additional control signals representative of character attributes.
Claim 2
Dependent Claim
139 words
An electrical circuit comprising: means for storing a plurality of sets of electrical patterns, each of said electrical patterns representative of character information and each set of electrical patterns defining a corresponding character set, said storing means coupled to receive a first portion of a coded electrical signal and at least one control signal to produce an output electrical signal representative of character information; and means for detecting a second portion of said coded electrical signal to produce said at least one control signal coupled to said storing means, said at least one control signal selecting one of said sets of electrical patterns, one of said electrical patterns within said selected one of said sets of electrical patterns being selected by said first portion of said coded electrical signal, and to produce additional control signals representative of character attributes.
Claim 3
Dependent Claim
32 words
The electrical circuit of claim 1 wherein said storage means is a read only memory (ROM) storing electrical patterns addressable by said first part of coded electrical signal and said control signal.
Claim 4
Dependent Claim
50 words
The electrical circuit of claim 1 wherein said detection means comprises a first and a second NAND gate and a data latch such that said second portion of coded electrical signal is coupled to the inputs of said first NAND gate and to the data inputs of said data latch.
Claim 5
Dependent Claim
39 words
The detection means of claim 3 wherein the output of said first NAND gate is said control signal coupled to said storage means and the outputs of said data latch are the additional control signals representative of character attributes.
Claim 6
Dependent Claim
51 words
The electrical circuit of claim 1 further comprising means for selectively modifying said output electrical signal according to said additional control signals representative of character attributes after said output electrical signal is produced by said means for storing, thereby changing an attribute of the character information said output electrical signal represents.
Claim 7
Dependent Claim
195 words
An electrical circuit comprising: means for storing a plurality of sets of electrical patterns, each of said electrical patterns representative of character information and each set of electrical patterns defining a corresponding character set, said storing means coupled to receive a first portion of a coded electrical signal and at least one control signal to produce a set of parallel binary output bits; means for converting said parallel binary output bits to a first sequence of binary bits representative of character information; means for detecting a second portion of said coded electrical signal to produce said at least one control signal coupled to said storing means, said at least one control signal selecting one of said sets of electrical patterns, one of said electrical patterns within said selected one of said sets of electrical patterns being selected by said first portion of said coded electrical signal, and to produce additional control signals representative of character attributes; and means for selectively changing states of said first sequence of binary bits according to a first of said additional control signals, thereby changing a first attribute of the character information represented by said first sequence of binary bits.
Claim 8
Dependent Claim
195 words
An electrical circuit comprising: means for storing a plurality of sets of electrical patterns, each of said electrical patterns representative of character information and each set of electrical patterns defining a corresponding character set, said storing means coupled to receive a first portion of a coded electrical signal and at least one control signal to produce a set of parallel binary output bits; means for converting said parallel binary output bits to a first sequence of binary bits representative of character information; means for detecting a second portion of said coded electrical signal to produce said at least one control signal coupled to said storing means, said at least one control signal selecting one of said sets of electrical patterns, one of said electrical patterns within said selected one of said sets of electrical patterns being selected by said first portion of said coded electrical signal, and to produce additional control signals representative of character attributes; and means for selectively changing states of said first sequence of binary bits according to a first of said additional control signals, thereby changing a first attribute of the character information represented by said first sequence of binary bits.
Claim 9
Dependent Claim
66 words
The electrical circuit of claim 6 further comprising: means for generating a second sequence of binary bits representative of character attribute information; and means for selectively combining said first sequence of binary bits with said second sequence of binary bits according to a second of said additional control signals, thereby changing a second attribute of the character information represented by said first sequence of binary bits.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-09-22 | 1990-03-24 | 1990-09-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-09-22 | 1994-03-24 | 1994-09-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-09-22 | 1998-03-24 | 1998-09-23 | $7700.00 | Window Closed / Lapsed |