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US4608692A Expired / Lapsed US ⏱️ 0.0 years remaining

Error correction circuit

Assignee: Toshiba Corp
•
Filing: 1984-09-06
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Granted: 1986-08-26
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Expires: 2004-09-06
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Abstract

Abstract An error correction circuit in which an error location polynomial is determined on the basis of the code word of the code of a double correction BCH symbol in Galois field GF(2 m ), thereby determining the error location and error pattern necessary for the error correction. The error correction circuit includes: (a) means for generating a syndrome S i (i being an integer) from the code word: (b) first and second means for holding S 1 and S 0 out of the syndromes outputted from the syndrome generating means; (c) means for effecting the following calculation on the basis of the syndrome generated by the syndrome generating means: r.sub.3 =S.sub.2 S.sub.0 +S.sub.1.sup.2 r.sub.2 =S.sub.3 S.sub.0 +S.sub.1 S.sub.2 r.sub.1 =S.sub.3 S.sub.1 +S.sub.2.sup.2 third means for holding r 3 out of r 3 , r 2 and r 1 ; (d) means for judging whether r 3 out of r 3 , r 2 and r 1 satisfy the condition: r 3 ≠0 or r 3 =0; (e) a control means for making, when the condition: r 3 ≠0 is confirmed by the judging means, the first and second holding means holding r 1 and r 2 in place of S 1 ad S 0 ; and (f) means for processing signals, which is adapted to add a value obtained through multiplying the content S 1 or r 1 of the first holding means and the content S 0 or r 2 of the second holding means by the element α i of the Galois field GF(2 m ) to a value of the third holding means with α 2i , whereby the element α i as obtained when the output from the signal processing means is reduced to zero is used as the error location.

Inventors

  • 👤 Masahide Nagumo
  • 👤 Tadashi Kojima
  • 👤 Jun Inagawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 19:22
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/03; H03M13/05; H03M13/13; H03M13/15; H03M13/151

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 321 words
An error correction circuit for detecting and correcting a plurality of errors in codewords made up of k data and n-k inspection symbols in the playback data from a recorded medium each symbol made up of m binary bits of information using a Reed-Solomon code for error detection and correction so that the error location polynomial σ(x)=x e +σ 1 x -1 + . . . +σ e where e is the number of errors and the coefficients σ 1 to σ e of the error location polynomial σ(x) are related to the error syndromes S i generated by the error correction circuit by the equation: S.sub.i+e +σ.sub.1 S.sub.i+e-1 + . . . σ.sub.e-1 S.sub.i+1 +σ.sub.3 S.sub.i =0 where the syndromes S i+e to S i are field elements α i of the Galois field GF(2 m ), the error correction circuit comprising: means for generating syndromes S 0 , S 1 , S 2 and S 3 from the codewords; means for effecting the following three calculations on the basis of the syndromes S 0 , S 1 , S 2 and S 3 generated by said syndrome generating means: S.sub.2 S.sub.0 +S.sub.1.sup.2 =r.sub.3 S.sub.3 S.sub.0 +S.sub.1 S.sub.2 =r.sub.2 S.sub.3 S.sub.1 +S.sub.2.sup.2 =r.sub.1 where r 3 , r 2 and r 1 represent the values of the respective calculations; means for judging whether the condition r 3 ≠0 or r 3 =0; a first processing means for finding error locations by determining the roots of the following equation as the error location polynomial, when the condition r 3 ≠0 is confirmed in said judging means: r.sub.3 x.sup.2 +r.sub.2 x+r.sub.1 =0 where x represents the error locations; and a second processing means for finding error location by determining the root of the following equation as the error location polynomial, when the condition r 3 =0 is confirmed in said judging means under the condition of r 2 =0: S.sub.1 +S.sub.0 x=0.
Claim 2
Dependent Claim 321 words
An error correction circuit for detecting and correcting a plurality of errors in codewords made up of k data and n-k inspection symbols in the playback data from a recorded medium each symbol made up of m binary bits of information using a Reed-Solomon code for error detection and correction so that the error location polynomial σ(x)=x e +σ 1 x -1 + . . . +σ e where e is the number of errors and the coefficients σ 1 to σ e of the error location polynomial σ(x) are related to the error syndromes S i generated by the error correction circuit by the equation: S.sub.i+e +σ.sub.1 S.sub.i+e-1 + . . . σ.sub.e-1 S.sub.i+1 +σ.sub.3 S.sub.i =0 where the syndromes S i+e to S i are field elements α i of the Galois field GF(2 m ), the error correction circuit comprising: means for generating syndromes S 0 , S 1 , S 2 and S 3 from the codewords; means for effecting the following three calculations on the basis of the syndromes S 0 , S 1 , S 2 and S 3 generated by said syndrome generating means: S.sub.2 S.sub.0 +S.sub.1.sup.2 =r.sub.3 S.sub.3 S.sub.0 +S.sub.1 S.sub.2 =r.sub.2 S.sub.3 S.sub.1 +S.sub.2.sup.2 =r.sub.1 where r 3 , r 2 and r 1 represent the values of the respective calculations; means for judging whether the condition r 3 ≠0 or r 3 =0; a first processing means for finding error locations by determining the roots of the following equation as the error location polynomial, when the condition r 3 ≠0 is confirmed in said judging means: r.sub.3 x.sup.2 +r.sub.2 x+r.sub.1 =0 where x represents the error locations; and a second processing means for finding error location by determining the root of the following equation as the error location polynomial, when the condition r 3 =0 is confirmed in said judging means under the condition of r 2 =0: S.sub.1 +S.sub.0 x=0.
Claim 3
Dependent Claim 446 words
An error correction circuit for detecting and correcting a plurality of errors in codewords made up of k data and n-k inspection symbols in the playback data from a recorded medium each symbol made up of m binary bits of information using a Reed-Solomon code for error detection and correction so that the error location polynomial σ(x)=x e +σ 1 x e-1 + . . . +σ e where e is the number of errors and the coefficients σ 1 to σ e of the error location polynomial σ(x) are related to the error syndromes S i generated by the error correction circuit by the equation: S.sub.i+e +σ.sub.1 S.sub.i+e-1 + . . . σ.sub.e-1 S.sub.i+1 +σ.sub.e S.sub.i =0 where the syndromes S i+e to S i are field elements α i of the Galois field GF(2 m ), the error correction circuit comprising: means for generating syndromes S 0 , S 1 , S 2 and S 3 from the codewords; first and second means for holding the syndromes S 1 and S 0 , means for effecting the following three calculations of the basis of the syndromes S 0 , S 1 , S 2 and S 3 generated by said syndrome generating means: S.sub.2 S.sub.0 +S.sub.1.sup.2 =r.sub.3 S.sub.3 S.sub.0 +S.sub.1 S.sub.2 =r.sub.2 S.sub.3 S.sub.1 +S.sub.2.sup.2 =r.sub.1 where r 3 , r 2 and r 1 represent the values of the respective calculations; third means for holding the value r 3 ; means for judging whether the condition r 3 ≠0 or r 3 =0; control means for replacing, when the condition r 3 ≠0 is determined by said judging means, the syndromes S 1 and S 0 with the values r 1 and r 2 in said first and second holding means; and processing means for finding error locations by determining the roots of the following equations as the error locations polynomials: r.sub.3 x.sup.2 +r.sub.2 x+r.sub.1 =0 or S.sub.1 +S.sub.0 x=0 where x represents the error locations, said processing means being adapted to add a value obtained through adding the content of said first holding means, the syndrome S 1 or the value r 1 , to the content of said second holding means, the syndrome S 0 or the value r 2 , after the content of said second holding means has been multiplied by an element α of said Galois field GF(2 m ), to a value obtained from said third holding means after the content of said third holding means has been multiplied by the element α 2 , whereby each element α obtained when the output from said processing means is reduced to zero is used as an error location.
Claim 4
Dependent Claim 446 words
An error correction circuit for detecting and correcting a plurality of errors in codewords made up of k data and n-k inspection symbols in the playback data from a recorded medium each symbol made up of m binary bits of information using a Reed-Solomon code for error detection and correction so that the error location polynomial σ(x)=x e +σ 1 x e-1 + . . . +σ e where e is the number of errors and the coefficients σ 1 to σ e of the error location polynomial σ(x) are related to the error syndromes S i generated by the error correction circuit by the equation: S.sub.i+e +σ.sub.1 S.sub.i+e-1 + . . . σ.sub.e-1 S.sub.i+1 +σ.sub.e S.sub.i =0 where the syndromes S i+e to S i are field elements α i of the Galois field GF(2 m ), the error correction circuit comprising: means for generating syndromes S 0 , S 1 , S 2 and S 3 from the codewords; first and second means for holding the syndromes S 1 and S 0 , means for effecting the following three calculations of the basis of the syndromes S 0 , S 1 , S 2 and S 3 generated by said syndrome generating means: S.sub.2 S.sub.0 +S.sub.1.sup.2 =r.sub.3 S.sub.3 S.sub.0 +S.sub.1 S.sub.2 =r.sub.2 S.sub.3 S.sub.1 +S.sub.2.sup.2 =r.sub.1 where r 3 , r 2 and r 1 represent the values of the respective calculations; third means for holding the value r 3 ; means for judging whether the condition r 3 ≠0 or r 3 =0; control means for replacing, when the condition r 3 ≠0 is determined by said judging means, the syndromes S 1 and S 0 with the values r 1 and r 2 in said first and second holding means; and processing means for finding error locations by determining the roots of the following equations as the error locations polynomials: r.sub.3 x.sup.2 +r.sub.2 x+r.sub.1 =0 or S.sub.1 +S.sub.0 x=0 where x represents the error locations, said processing means being adapted to add a value obtained through adding the content of said first holding means, the syndrome S 1 or the value r 1 , to the content of said second holding means, the syndrome S 0 or the value r 2 , after the content of said second holding means has been multiplied by an element α of said Galois field GF(2 m ), to a value obtained from said third holding means after the content of said third holding means has been multiplied by the element α 2 , whereby each element α obtained when the output from said processing means is reduced to zero is used as an error location.

References Cited (Backward Citations)

US4142174A Cited
US4360916A Cited
US4498175A Cited
US4509172A Cited
US4556977A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-08-25 1990-02-24 1990-08-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-08-25 1994-02-24 1994-08-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-08-25 1998-02-24 1998-08-26 $7700.00 Window Closed / Lapsed

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