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US4498175A Expired / Lapsed US ⏱️ 0.0 years remaining

Error correcting system

Assignee: Toshiba Corp
•
Filing: 1982-09-30
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Granted: 1985-02-05
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Expires: 2002-09-30
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Abstract

Abstract An error correcting system uses an error location polynomial which is defined by double correction BCH codes each consisting of the elements of a Galois field GF(2 m ), and thereby generates error locations σ 1 and α 2 and error patterns e 1 and 2 2 . The system has a first data processing system for performing only addition and multiplication to generate the error locations σ 1 and α 2 , and a second data processing system for performing only addition and multiplication to generate the error patterns e 1 and 2 2 . The first data processing system comprises a syndrome generator, a memory, an arithmetic logic unit, registers, latch circuits, registers, adder circuits and a zero detector. The second data processing system comprises a gate circuit, latch circuits, an arithmetic logic unit, and the registers of a memory.

Inventors

  • 👤 Masahide Nagumo
  • 👤 Jun Inagawa
  • 👤 Tadashi Kojima

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 18:00
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/03; H03M13/05; H03M13/13; H03M13/15; H03M13/151; G; G06; G06F; G06F11/00; G06F11/07; G06F11/08; G06F11/10; G06F7/00; G06F7/60; G06F7/72; G06F7/724; G06F7/726; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/1806; G11B20/1809

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 429 words
An error correcting system which receives double correction BCH codes each consisting of M data symbols and four parity symbols, each consisting of m bits and represented by the following generated polynomial: g.sub.(x)=( x+1)(x+α)(x+α.sup.2)(x+α.sup.3), where α is the origin element of Galois field GF(2 m ), and which find the roots of the following error location polynomial: f.sub.(x) =x.sup.2 +σ.sub.1 x+σ.sub.2, thereby correcting errors in the double correction BCH codes, said system comprising: means for storing the double correction BCH codes; syndrome generating means for generating four syndromes S 0 , S 1 , S 2 and S 3 from the double correction BCH codes; error location calculating means comprising: a first multiplying/adding section for multiplying and adding the four syndromes S 0 , S 1 , S 2 and S 3 to obtain three syndromes S a , S b and S c which are given as follows: S.sub.a =S.sub.1.sup.2 +S.sub.0 S.sub.2, S.sub.b =S.sub.0 S.sub.3 +S.sub.1 S.sub.2, S.sub.c =S.sub.1 S.sub.3 +S.sub.2.sup.2 a second multiplying/adding section for performing multiplication and addition by substituting α 0 -α M+3 for x in the following polynomial obtained by transforming said error location polynomial f.sub.(x) : f'.sub.(x) =S.sub.a f.sub.(x) =S.sub.a x.sup.2 +S.sub.b x+S.sub.c, thereby obtaining two products S a ·α 2 and S b ·α and a sum S a α 2 +S b α+S c , utilizing the fact that the coefficients σ 1 , σ 2 of said error location polynomial f.sub.(x) and the three syndromes S a , S b and S c have the following relations according to the theory on the correction of said double correction BCH codes: σ.sub.1 =S.sub.b /S.sub.a =α.sup.i +α.sup.j, σ.sub.2 =S.sub.c /S.sub.a =α.sup.i α.sup.j ; an α i , α j detecting section for detecting α i and α j which satisfy f'.sub.(x) =0; and a third multiplying/adding section for adding α i and α j and multiplying α i by α j , thereby finding the coefficients σ 1 , σ 2 which define error locations; error pattern calculating means comprising a fourth multiplying/adding means for obtaining an error pattern e i from α i and α j by performing the following multiplication: e.sub.1 =(S.sub.0 α.sup.j +S.sub.1)(α.sup.i +α.sup.j).sup.-1, said equation having been derived from the following division: ##EQU22## and for obtaining another error pattern e j by performing the following addition: e.sub.j =S.sub.0 +e.sub.i ; and correction means for correcting the errors in said double correction codes stored by said code storing means in accordance with the coefficients σ 1 , σ 2 and the error patterns e i , e j .
Claim 2
Dependent Claim 429 words
An error correcting system which receives double correction BCH codes each consisting of M data symbols and four parity symbols, each consisting of m bits and represented by the following generated polynomial: g.sub.(x)=( x+1)(x+α)(x+α.sup.2)(x+α.sup.3), where α is the origin element of Galois field GF(2 m ), and which find the roots of the following error location polynomial: f.sub.(x) =x.sup.2 +σ.sub.1 x+σ.sub.2, thereby correcting errors in the double correction BCH codes, said system comprising: means for storing the double correction BCH codes; syndrome generating means for generating four syndromes S 0 , S 1 , S 2 and S 3 from the double correction BCH codes; error location calculating means comprising: a first multiplying/adding section for multiplying and adding the four syndromes S 0 , S 1 , S 2 and S 3 to obtain three syndromes S a , S b and S c which are given as follows: S.sub.a =S.sub.1.sup.2 +S.sub.0 S.sub.2, S.sub.b =S.sub.0 S.sub.3 +S.sub.1 S.sub.2, S.sub.c =S.sub.1 S.sub.3 +S.sub.2.sup.2 a second multiplying/adding section for performing multiplication and addition by substituting α 0 -α M+3 for x in the following polynomial obtained by transforming said error location polynomial f.sub.(x) : f'.sub.(x) =S.sub.a f.sub.(x) =S.sub.a x.sup.2 +S.sub.b x+S.sub.c, thereby obtaining two products S a ·α 2 and S b ·α and a sum S a α 2 +S b α+S c , utilizing the fact that the coefficients σ 1 , σ 2 of said error location polynomial f.sub.(x) and the three syndromes S a , S b and S c have the following relations according to the theory on the correction of said double correction BCH codes: σ.sub.1 =S.sub.b /S.sub.a =α.sup.i +α.sup.j, σ.sub.2 =S.sub.c /S.sub.a =α.sup.i α.sup.j ; an α i , α j detecting section for detecting α i and α j which satisfy f'.sub.(x) =0; and a third multiplying/adding section for adding α i and α j and multiplying α i by α j , thereby finding the coefficients σ 1 , σ 2 which define error locations; error pattern calculating means comprising a fourth multiplying/adding means for obtaining an error pattern e i from α i and α j by performing the following multiplication: e.sub.1 =(S.sub.0 α.sup.j +S.sub.1)(α.sup.i +α.sup.j).sup.-1, said equation having been derived from the following division: ##EQU22## and for obtaining another error pattern e j by performing the following addition: e.sub.j =S.sub.0 +e.sub.i ; and correction means for correcting the errors in said double correction codes stored by said code storing means in accordance with the coefficients σ 1 , σ 2 and the error patterns e i , e j .
Claim 3
Dependent Claim 21 words
An error correcting system according to claim 1, wherein said first, third and fourth multiplying/adding sections are comprised of one section.
Claim 4
Dependent Claim 143 words
An error correcting system according to claim 1, wherein said fourth multiplying/adding section includes means for finding a reciprocal component (α i +α j ) -1 which is used to obtain the error pattern e i and which is given by the following equation: (α.sup.i +α.sup.j).sup.-1 =Sa·α.sup.-(M+4)m, where α q is the value for x which satisfies Sa(α i +α j )x=α.sup.(M+4), said means comprising: gate circuit means having 2 m-1 /M+4 gates forming a table [α.sup.(M+4)m :α - (M+4)m ]; latch circuit means for latching α - (M+4)m stored in said gate circuit means and coincident to S b α, which is output from said second multiplying/adding section, and latching α 0 -α M+3 as data α q when S b is output from said second multiplying/adding section; and multiplying means for multiplying α - (M+4)m, S a and α q .
Claim 5
Dependent Claim 120 words
An error correcting system according to claim 1, wherein said first, third and fourth multiplying/adding sections each include a muliplier unit which performs the following multiplication: B(α)·C(α)=M.sub.1 +M.sub.2, where: B(α)=b.sub.m-1 α.sup.m-1 +b.sub.m-2 α.sup.m-2 +. . . +b.sub.0, C(α)=C.sub.m-1 α.sup.m-1 +C.sub.m-2 α.sup.m-2 +. . . +C.sub.0, provided that: M.sub.1 ={αB(α)}(C.sub.m-1 α.sup.m-2 +C.sub.m-2 α.sup.m-4 +. . . +C.sub.3 α.sup.2 +C.sub.1) M.sub.2 =B(α)(C.sub.m-2 α.sup.m-2 +C.sub.m-4 α.sup.m-4 +. . . +C.sub.2 α.sup.2 +C.sub.0), said multiplier unit comprising: a first multiplier circuit for performing a multiplication to find M 1 in a first step; a second multiplier circuit for performing a multiplication to find M 2 in a second step; and an adder circuit for adding the outputs from the first and second multiplier circuits.

References Cited (Backward Citations)

US4142174A Cited
US4413340A Cited
US4413339A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-02-05 1988-08-06 1989-02-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-02-05 1992-08-06 1993-02-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-02-05 1996-08-06 1997-02-05 $7700.00 Window Closed / Lapsed

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