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FET-bipolar switching device and circuit

Assignee: Hitachi Ltd
•
Filing: 1982-05-10
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Granted: 1986-08-05
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Expires: 2002-05-10
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Abstract

Abstract A switching device and circuit comprises a bipolar transistor and at least two field effect transistors for controlling the bipolar transistor. A first field effect transistor has its drain and source connected across the collector-base of the bipolar transistor and a second field effect transistor has its drain and source connected across the base-emitter of the bipolar transistor. Gates of the first and second field effect transistors are connected in common and supplied with a voltage signal. The first field effect transistor is of an enhancement type and the second field effect transistor is of a depletion type.

Inventors

  • 👤 Takao Sasayama
  • 👤 Kazuo Kato
  • 👤 Masayoshi Naito

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 16:54
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10D84/403; H10D84/406; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/567; H10D84/80; H10D84/82; H10D84/83; H10D84/8311

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 104 words
A switching device comprising a MOS FET, a depletion type FET and a bipolar transistor, a source of the MOS FET being connected to a drain of the depletion type FET with the connecting junction connected to a base of the bipolar transistor, a drain of the MOS FET being connected to a collector of the bipolar transistor and a source of the depletion type FET being connected to an emitter of the bipolar transistor, the collector-emitter conduction or non-conduction of said bipolar transistor being controlled by an input signal applied to gates of the MOS FET and depletion type FET connected in common.
Claim 2
Dependent Claim 104 words
A switching device comprising a MOS FET, a depletion type FET and a bipolar transistor, a source of the MOS FET being connected to a drain of the depletion type FET with the connecting junction connected to a base of the bipolar transistor, a drain of the MOS FET being connected to a collector of the bipolar transistor and a source of the depletion type FET being connected to an emitter of the bipolar transistor, the collector-emitter conduction or non-conduction of said bipolar transistor being controlled by an input signal applied to gates of the MOS FET and depletion type FET connected in common.
Claim 3
Dependent Claim 26 words
A switching device according to claim 1, wherein the MOS FET and depletion type FET have channel charge carrier types which are different from each other.
Claim 4
Dependent Claim 55 words
A switching device according to claim 1, wherein a collector region of the bipolar transistor and a drain region of an enhancement type MOS FET are formed in common, and the depletion type FET in the form of a junction type FET which is insulated by an isolation region is formed in the common region.
Claim 5
Dependent Claim 57 words
A switching device according to claim 1, wherein a collector region of the bipolar transistor and a drain region of and enhancement type MOS FET are formed in common, and the depletion type FET is formed which has a channel adjacent to a base formed in the common region and whose source is connected to and emitter.
Claim 6
Dependent Claim 34 words
A switching device according to claim 1, wherein a metal-semiconductor diode is connected across the base-collector junction of said bipolar transistor, said diode having the same current-conducting direction as that of the base-collector junction.
Claim 7
Dependent Claim 79 words
A circuit incorporating the switching device according to claim 1, wherein a source of an enhancement type FET having the same polarity as that of an enhancement type MOS FET connected across the collector-base of a bipolar transistor is connected to a base electrode of the bipolar transistor, gates of the enhancement type MOS FET and the enhancement type FET are connected in common, and a drain of the enhancement type FET is connected to a bias supply source.
Claim 8
Dependent Claim 27 words
A circuit incorporating the switching device according to claim 1, wherein said circuit is directly driven by a pulse width modulation (PWM) circuit comprising a CMOS timer.
Claim 9
Dependent Claim 28 words
A switching device according to claim 1, wherein the gate of the MOS FET and the depletion type FET are directly coupled in short-circuit relationship with one another.

References Cited (Backward Citations)

US3636372A Cited
US4066917A Cited
US4286175A Cited
US4303841A Cited
US4356416A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-08-04 1990-02-03 1990-08-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-08-04 1994-02-03 1994-08-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-08-04 1998-02-03 1998-08-05 $7700.00 Window Closed / Lapsed

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