US4602207A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Temperature and power supply stable current source
Assignee: Nokia Bell Labs
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Filing: 1984-03-26
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Granted: 1986-07-22
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Expires: 2004-03-26
Abstract
Abstract Current source circuitry consisting of a first n-channel field effect transistor (FET) and voltage generator circuitry coupled to the gate of the first FET. The voltage generator circuitry acts to control the current through the first FET such that it is essentially constant even with power supply, temperature, and many processing variations. The voltage generator circuitry consists of a second FET, a two input differential operational amplifier, a resistor, and an n-p-n transistor if the resistor has a positive temperature coefficient. A negative feedback path using the amplifier and the second FET ensures against current changes in the first and second FETs even if there are changes in one of the power supply levels and/or many semiconductor processing variations.
Inventors
- 👤 Suk K. Kim
- 👤 Edward J. Zimany, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 02:49
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; Y; Y10; Y10S; Y10S323/00; Y10S323/907
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
217 words
Circuitry comprising: a first transistor having a control terminal and first and second output terminals; a second transistor, of the same type as the first transistor, having a control terminal and first and second output terminals; resistive means having first and second terminals and characterized by a positive temperature coefficient; a differential amplifier having a positive and a negative input terminal and an output terminal; the output terminal of the amplifier being coupled to the control terminals of the first and second devices; the positive input terminal of the amplifier being coupled to the second terminal of the resistive means and to the first output terminal of the second device; a p-n junction device having a p-n junction formed at a junction of first and second semiconductor regions, said first and second regions being respectively contacted by first and second terminals of the junction device, said p-n junction being characterized by a negative temperature coefficient, the first terminal of the device being connectable to a first reference potential, the second terminal of the device being coupled to the first terminal of the resistive means, the negative input terminal of the amplifier being connectable to a second reference potential; and the second output terminals of the first and second transistors being connectable to a first power supply potential.
Claim 2
Dependent Claim
217 words
Circuitry comprising: a first transistor having a control terminal and first and second output terminals; a second transistor, of the same type as the first transistor, having a control terminal and first and second output terminals; resistive means having first and second terminals and characterized by a positive temperature coefficient; a differential amplifier having a positive and a negative input terminal and an output terminal; the output terminal of the amplifier being coupled to the control terminals of the first and second devices; the positive input terminal of the amplifier being coupled to the second terminal of the resistive means and to the first output terminal of the second device; a p-n junction device having a p-n junction formed at a junction of first and second semiconductor regions, said first and second regions being respectively contacted by first and second terminals of the junction device, said p-n junction being characterized by a negative temperature coefficient, the first terminal of the device being connectable to a first reference potential, the second terminal of the device being coupled to the first terminal of the resistive means, the negative input terminal of the amplifier being connectable to a second reference potential; and the second output terminals of the first and second transistors being connectable to a first power supply potential.
Claim 3
Dependent Claim
36 words
The circuitry of claim 1 in which the first and second regions are the base and emitter regions, respectively, of a bipolar transistor having a collector terminal which is connectable to a second power supply potential.
Claim 4
Dependent Claim
24 words
The circuitry of claim 1 wherein: the first and second transistors are insulated gate field effect transistors; and the resistive means is a resistor.
Claim 5
Dependent Claim
33 words
The circuitry of claim 3 wherein: the field effect transistors are n-channel enhancement mode devices; the p-n junction device is an n-p-n type bipolar transistor; and the resistor is a p-type silicon resistor.
Claim 6
Dependent Claim
31 words
The circuitry of claim 3 wherein: the field effect transistors are p-channel enhancement mode devices; the bipolar transistor is a p-n-p type transistor; and the resistor is a p-type silicon resistor.
Claim 7
Dependent Claim
203 words
Voltage generator circuitry, coupled to a control terminal of a first transistor device having first and second output terminals and the control terminal, comprising: a second transistor device of the same type as the first device having a control terminal and first and second ouput terminals; resistive means, characterized by a positive temperature coefficient, having first and second terminals; a differential amplifier having negative and positive input terminals and an output terminal; the output terminal of the amplifier being coupled to the control terminals of the first and second devices; the positive input terminal of the amplifier being coupled to the second terminal of the resistive means and to the first output terminal of the second device; a bipolar transistor having a base-emitter junction which is characterized by a negative temperature coefficient, having a base terminal connectable to a first reference potential, and having an emitter terminal coupled to the first terminal of the resistive means, the negative input terminal of the amplifier being connectable to a second reference potential, the second terminals of the first and second devices being connectable to a first power supply potential, and the collector terminal of the bipolar transistor being connectable to a second power supply potential.
Claim 8
Dependent Claim
203 words
Voltage generator circuitry, coupled to a control terminal of a first transistor device having first and second output terminals and the control terminal, comprising: a second transistor device of the same type as the first device having a control terminal and first and second ouput terminals; resistive means, characterized by a positive temperature coefficient, having first and second terminals; a differential amplifier having negative and positive input terminals and an output terminal; the output terminal of the amplifier being coupled to the control terminals of the first and second devices; the positive input terminal of the amplifier being coupled to the second terminal of the resistive means and to the first output terminal of the second device; a bipolar transistor having a base-emitter junction which is characterized by a negative temperature coefficient, having a base terminal connectable to a first reference potential, and having an emitter terminal coupled to the first terminal of the resistive means, the negative input terminal of the amplifier being connectable to a second reference potential, the second terminals of the first and second devices being connectable to a first power supply potential, and the collector terminal of the bipolar transistor being connectable to a second power supply potential.
Claim 9
Dependent Claim
25 words
The circuitry of claim 6 wherein: the first and second transistor devices are insulated gate field effect transistors; and the resistive means is a resistor.
Claim 10
Dependent Claim
30 words
The circuitry of claim 7 wherein: the field-effect transistors are n-channel enhancement mode devices; the bipolar transistor is an n-p-n type transistor; and the resistor is a p-type silicon resistor.
Claim 11
Dependent Claim
30 words
The circuitry of claim 8 wherein: the field-effect transistors are p-channel enhancement mode devices; the bipolar transistor is a p-n-p type transistor; and the resistor is a p-type silicon resistor.
References Cited (Backward Citations)
US30586A
Cited
US2996918A
Cited
US3158822A
Cited
US3956645A
Cited
USRE30586E
Cited
US4263519A
Cited
US4427903A
Cited
US4446419A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-07-21 | 1990-01-20 | 1990-07-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-07-21 | 1994-01-20 | 1994-07-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-07-21 | 1998-01-20 | 1998-07-22 | $7700.00 | Window Closed / Lapsed |