US4600893A
Expired / Lapsed
US
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Differential amplifier with improved dynamic range
Assignee: Toshiba Corp
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Filing: 1984-10-18
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Granted: 1986-07-15
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Expires: 2004-10-18
Abstract
Abstract A differential amplifier has first and second transistors whose bases respectively receive first and second voltage signals. The collectors of the first and second npn transistors are commonly connected to a power source terminal respectively through resistors. The emitters of the first and second npn transistors are grounded through a constant current source. The differential amplifier further has first and second pnp transistors in a common-base configuration. The collectors of the first and second npn transistors are connected to the emitters of the first and second pnp transistors.
Inventors
- 👤 Yasuhiro Sugimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 21:52
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F1/00; H03F1/08; H03F1/22; H03F3/45; H03F3/45071; H03F3/45076; H03F3/4508; H03F3/45085; H03F3/45094
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
226 words
A differential amplifier comprising: first and second potential terminals between which a power source voltage is applied; detecting means, including first and second transistors whose emitters are coupled to each other and further including a constant current source connected between said first potential terminal and the junction of the emitters of said first and second transistors, for detecting a voltage difference between first and second voltage signals supplied to the base of said first and second transistors, respectively; amplifying means including third and fourth transistors which have a complementary relationship to said first and second transistors, and whose emitters are respectively connected to the collectors of said first and second transistors, said amplifying means also including a bias circuit for supplying bias voltages to the bases to said third and fourth transistors, and a load circuit connected between the collectors of said third and fourth transistors and said first potential terminal; first connecting means coupling said second potential terminal with the emitter of said third transistor, for setting the potential at the emitter of said third transistor to a level corresponding to that of said second potential terminal; and second connecting means coupling said second potential terminal with the emitter of said fourth transistor, for setting the potential at the emitter of said fourth transistor to a level corresponding to that of said second potential terminal.
Claim 2
Dependent Claim
226 words
A differential amplifier comprising: first and second potential terminals between which a power source voltage is applied; detecting means, including first and second transistors whose emitters are coupled to each other and further including a constant current source connected between said first potential terminal and the junction of the emitters of said first and second transistors, for detecting a voltage difference between first and second voltage signals supplied to the base of said first and second transistors, respectively; amplifying means including third and fourth transistors which have a complementary relationship to said first and second transistors, and whose emitters are respectively connected to the collectors of said first and second transistors, said amplifying means also including a bias circuit for supplying bias voltages to the bases to said third and fourth transistors, and a load circuit connected between the collectors of said third and fourth transistors and said first potential terminal; first connecting means coupling said second potential terminal with the emitter of said third transistor, for setting the potential at the emitter of said third transistor to a level corresponding to that of said second potential terminal; and second connecting means coupling said second potential terminal with the emitter of said fourth transistor, for setting the potential at the emitter of said fourth transistor to a level corresponding to that of said second potential terminal.
Claim 3
Dependent Claim
22 words
A differential amplifier according to claim 1, wherein said first and second connecting means include, respectively, first and second voltage drop means.
Claim 4
Dependent Claim
22 words
A differential amplifier according to claim 1, wherein said first and second connecting means include, respectively, second and third constant current sources.
Claim 5
Dependent Claim
21 words
A differential amplifier according to claim 2, wherein said first and second voltage drop means are each resistors of equal resistance.
Claim 6
Dependent Claim
22 words
A differential amplifier according to claim 4, wherein said bias circuit is connected to the bases of said third and fourth transistors.
Claim 7
Dependent Claim
47 words
A differential amplifier according to claim 5, wherein said load circuit includes third voltage drop means connected between said first potential terminal and the collector of said third transistor, and fourth voltage drop means connected between the first potential terminal and the collector of said fourth transistor.
Claim 8
Dependent Claim
21 words
A differential amplifier according to claim 6, wherein said third and fourth voltage drop means are each resistors of equal resistance.
Claim 9
Dependent Claim
57 words
A differential amplifier according to claim 7, wherein said detecting means includes a first resistor connected between said first constant current source and the emitter of said first transistor and a second resistor connected between said first constant current source and the emitter of said second transistor, said resistors in said detecting means having the same resistance.
Claim 10
Dependent Claim
29 words
A differential amplifier according to claim 1, wherein said first and second transistors are of a pnp type, and said third and fourth transistors are of an npn type.
Claim 11
Dependent Claim
30 words
A differential amplifier according to a claim 1, wherein said first and second transistors are of an npn type, and said third and fourth transistors are of a pnp type.
Claim 12
Dependent Claim
27 words
A differential amplifier according to claim 1, wherein said load circuit comprises a current mirror circuit for delivering equal collector currents to said third and fourth transistors.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-07-14 | 1990-01-13 | 1990-07-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-07-14 | 1994-01-13 | 1994-07-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-07-14 | 1998-01-13 | 1998-07-15 | $7700.00 | Window Closed / Lapsed |