US4600847A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Predistortion equalizing circuit
Assignee: Verizon Laboratories Inc
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Filing: 1984-12-24
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Granted: 1986-07-15
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Expires: 2004-12-24
Abstract
Abstract A predistortion circuit that cancels second order distortion of light emitting diodes enabling interference free transmission of multiple vestigial sideband television channels through a single optical fiber. This is achieved by preamplifying a signal with an amplifier that has opposite characteristics to the distortions of a light emitting diode.
Inventors
- 👤 Peter N. Baum
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 21:24
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/32; H03F1/3241; H03F1/3276; H03F3/00; H03F3/04; H03F3/08
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
200 words
An equalizing circuit for predistorting an input signal to be applied to a light emitting diode to compensate for second order distortion caused by said light emitting diode comprising an NPN transistor having a collector, a base, and an emitter; a PNP transistor having a collector, a base, and an emitter; means for coupling an input signal to said bases of said transistors; first impedance means for coupling said collector of said NPN transistor to a source of positive potential; second impedance means for coupling said collector of said PNP transistor to a source of negative potential; third impedance means for coupling said emitter of said NPN transistor to a source of negative potential; fourth impedance means for coupling said emitter of said PNP transistor to a source of positive potential; means for coupling said collectors to said light emitting diode; and emitter resistance means including a serially connected first variable resistance and semiconductor diode coupled as a dynamic emitter load resistance across said emitters and a point of reference potential, and a second variable resistance coupling one electrode of said semiconductor diode to a voltage source of such polarity as to cause current to flow through said semiconductor diode.
Claim 2
Dependent Claim
200 words
An equalizing circuit for predistorting an input signal to be applied to a light emitting diode to compensate for second order distortion caused by said light emitting diode comprising an NPN transistor having a collector, a base, and an emitter; a PNP transistor having a collector, a base, and an emitter; means for coupling an input signal to said bases of said transistors; first impedance means for coupling said collector of said NPN transistor to a source of positive potential; second impedance means for coupling said collector of said PNP transistor to a source of negative potential; third impedance means for coupling said emitter of said NPN transistor to a source of negative potential; fourth impedance means for coupling said emitter of said PNP transistor to a source of positive potential; means for coupling said collectors to said light emitting diode; and emitter resistance means including a serially connected first variable resistance and semiconductor diode coupled as a dynamic emitter load resistance across said emitters and a point of reference potential, and a second variable resistance coupling one electrode of said semiconductor diode to a voltage source of such polarity as to cause current to flow through said semiconductor diode.
Claim 3
Dependent Claim
64 words
The circuit as recited in claim 1 wherein said second variable resistance can be varied to obtain a desired amount of nonlinearity about a current-voltage characteristic of said semiconductor diode, and said first variable resistance can be varied to add linearity to this characteristic such that the combined effect matches and thus cancels the nonlinearity of a current-power characteristic of said light emitting diode.
Claim 4
Dependent Claim
192 words
An equalizing circuit for predistorting an input signal to be applied to a device to compensate for distortion caused by said device comprising an NPN transistor having a collector, a base, and an emitter; a PNP transistor having a collector, a base, and an emitter; means for coupling an input signal to said bases of said transistors; first impedance means for coupling said collector of said NPN transistor to a source of positive potential; second impedance means for coupling said collector of said PNP transistor to a source of negative potential; third impedance means for coupling said emitter of said NPN transistor to a source of negative potential; fourth impedance means for coupling said emitter of said PNP transistor to a source of positive potential; means for coupling said collectors to said device; and emitter resistance means including a serially connected first variable resistance and semiconductor diode coupled as a dynamic emitter load resistance across said emitters and a point of reference potential, and a second variable resistance coupling one electrode of said semiconductor diode to a voltage source of such polarity as to cause current to flow through said semiconductor diode.
Claim 5
Dependent Claim
192 words
An equalizing circuit for predistorting an input signal to be applied to a device to compensate for distortion caused by said device comprising an NPN transistor having a collector, a base, and an emitter; a PNP transistor having a collector, a base, and an emitter; means for coupling an input signal to said bases of said transistors; first impedance means for coupling said collector of said NPN transistor to a source of positive potential; second impedance means for coupling said collector of said PNP transistor to a source of negative potential; third impedance means for coupling said emitter of said NPN transistor to a source of negative potential; fourth impedance means for coupling said emitter of said PNP transistor to a source of positive potential; means for coupling said collectors to said device; and emitter resistance means including a serially connected first variable resistance and semiconductor diode coupled as a dynamic emitter load resistance across said emitters and a point of reference potential, and a second variable resistance coupling one electrode of said semiconductor diode to a voltage source of such polarity as to cause current to flow through said semiconductor diode.
Claim 6
Dependent Claim
56 words
The circuit as recited in claim 3 wherein said second variable resistance can be varied to obtain a desired amount of nonlinearity about a current/voltage characteristic of said semiconductor diode, and said first variable resistance can be varied to modify this nonlinearity to match and thus cancel the nonlinearity of a current/power characteristic of such device.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-07-14 | 1990-01-13 | 1990-07-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-07-14 | 1994-01-13 | 1994-07-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-07-14 | 1998-01-13 | 1998-07-15 | $7700.00 | Window Closed / Lapsed |