Wide band constant duty cycle pulse train processing circuit

Claim 1

A pulse train processing circuit to generate, from an input pulse train of variable pulse repetition frequency, an output pulse train with a constant, predetermined duty cycle, comprising, in accordance with the invention, a wave-shaping circuit (1) having a data input (2, 22), generating square-wave pulses of a length or duration (d) and having a control input (13, 14) determining the pulse length (d) of the square-wave pulses at an output thereof; a decoding circuit (29) connected to the output of said wave-shaping circuit (1) for recognition, in a signal train encoded in bi-phase mark code wherein bit cell boundaries are denoted by a phase alternation, and isolation of an additional phase alternation in the middle of a bit cell indicating that said bit cell represents a logical "1"; a recognition circuit (34) connected to the output of the decoding circuit (29) for isolating any multiple additional phase alternations within a period of time recognized as a basic clock period; a low-pass filter (4, 5) connected to receive the square-wave pulses from said wave-shaping circuit (1); a source of controllable voltage (6, 7) supplying a comparison or command voltage; a differential amplifier (3) receiving, as one input, the output of the low-pass filter (4, 5) and, as another input, the comparison or command voltage of the controllable voltage source; a transistor circuit (35) connected to the output of said recognition circuit (34) and acting upon said differential amplifer (3) so as to shorten said pulse duration (d); and a controlled current source (12) connected to and controlled by the output from the differential amplifier (3) and supplying a controlled current to the control input (13, 14) of the wave-shaping circuit (1).