Logic probe

Claim 2

Test equipment for determining the logic state of a digital circuit comprising: electrically conductive probe means for contacting a circuit to determine the voltage or logic state of the circuit; logic "1" detector means having a probe input connected to said probe means, a threshold input, and an output for producing a signal when the voltage at said probe input exceeds the voltage at said threshold input; first gate means responsive to an output signal from said logic "1" detector means for producing a logic "1" signal; logic "0" detector means having a probe input connected to said probe means, a threshold input, and an output for producing a signal when the voltage at said probe input falls below the voltage at said threshold input; second gate means responsive to an output signal from said logic "0" detector means for producing a logic "0" signal; means for setting voltage levels at the probe and threshold inputs of said detector means for testing TTL circuitry and for setting different voltage levels at said inputs for testing CMOS circuitry; means for selecting which voltage levels are set at said inputs of said detector means; and display means connected to said first and second gate means and responsive to a logic signal therefrom for indicating the logic state of the circuit under test.

Claim 3

Test equipment according to claim 1 including: ground detector means having a threshold input, means for setting the voltage level at said threshold input to accord with ground voltage for a circuit, a probe input connected to said probe means so that the voltage level of a circuit being tested can be compared to the threshold voltage level, an output for producing a signal when the voltage at said probe input falls below the threshold voltage at said threshold input; means connecting said probe input to the probe input of said logic "0" detector means whereby the voltage at the probe input to said ground detector means is set depending on whether TTL or CMOS circuitry is being tested; third gate means responsive to an output signal from said ground detector means for producing a ground level signal, said third gate means being connected to said display means whereby a ground level signal is indicated; and means connecting said third gate means to said second gate means so that said second gate means produces a logic "0" signal only when said third gate means does not produce a ground level signal.

Claim 4

Test equipment according to claim 2 including: means connecting the output of said third gate means to an input of said second gate means so that said second gate means produces a logic level signal only when said third detector means detects a voltage level above ground voltage and said third gate means does not produce a ground level signal.

Claim 5

Test equipment according to claim 1 including: additional gate means for producing an output signal which causes said display means to indicate an uncommitted circuit condition when said logic "1" and said logic "0" detector means do not produce output signals.

Claim 6

Test equipment according to claim 2 including supply voltage detector means having a threshold input, means for setting the voltage level at said threshold input to accord with the supply voltage for a circuit being tested, a probe input connected to said probe means so that the voltage level of the circuit being tested can be compared to the threshold voltage level, an output for producing a signal when the voltage at said probe input exceeds the threshold voltage; means connecting said probe input to the probe input of said logic "1" detector means whereby the voltage at the probe input to said supply voltage detector means is set depending on whether TTL or CMOS circuitry is being tested; fourth gate means responsive to an output signal from said supply voltage detector means for producing a supply voltage level signal, said fourth gate means being connected to said display means whereby a supply voltage level signal is indicated; and means connecting said first gate means to said fourth gate means so that said fourth gate means produces a supply voltage level signal only when said first gate means does not produce a logic "1" signal.

Claim 7

Test equipment according to claim 5 including: fifth gate means having an input connected to the output of said supply voltage detector means and an output connected to said first gate means so that said first gate means produces a logic "1" signal only when said fourth detector means does not produce a signal to cause said fourth gate means to produce a supply level signal.

Claim 8

Test equipment for determining the logic state of a digital circuit comprising: electrically conductive probe means for contacting a circuit to determine the voltage or logic state of the circuit; display means for indicating that said probe means is contacting a ground level voltage or a logic "0" test point; first gate circuit means having a ground level threshold input, a probe input connected to said probe means, and an output for producing a signal when said probe means contacts a ground level test point, and a first AND gate connected to said output for producing a display signal to cause said display means to indicate a ground level voltage; second gate circuit means having a logic "0" threshold input, a probe input connected to said probe means, an output for producing a signal when said probe means contacts a logic "0" test point, and a second AND gate connected to said output for producing a display signal to cause said display means to indicate a logic "0" voltage; and means connecting said first and said second AND gates so that a display signal from said first AND gate prevents said second AND gate from producing a display signal.

Claim 9

Test equipment for determining the logic state of a digital circuit comprising: electrically conductive probe means for contacting a circuit to determine the voltage or logic state of the circuit; display means for indicating that said probe means is contacting a ground level voltage or a logic "0" test point; first gate circuit means having a ground level threshold input, a probe input connected to said probe means, and an output for producing a signal when said probe means contacts a ground level test point, and a first AND gate connected to said output for producing a display signal to cause said display means to indicate a ground level voltage; second gate circuit means having a logic "0" threshold input, a probe input connected to said probe means, an output for producing a signal when said probe means contacts a logic "0" test point, and a second AND gate connected to said output for producing a display signal to cause said display means to indicate a logic "0" voltage; and means connecting said first and said second AND gates so that a display signal from said first AND gate prevents said second AND gate from producing a display signal.

Claim 10

Test equipment according to claim 7 including circuit means to set the threshold input of said first gate circuit means for a logic "0" voltage level for TTL logic circuitry; additional circuit means to set said threshold input of said first gate circuit means for a different logic "0" voltage level for CMOS logic circuitry; and switch means for selecting either said circuit means or said additional circuit means to set the logic "0" voltage level of said first gate circuit means.

Claim 11

Test equipment for determining the logic state of a digital circuit comprising: electrically conductive probe means for contacting a circuit to determine the voltage or logic state of the circuit; display means for indicating that said probe means is contacting a supply voltage or a logic "1" test point; first gate circuit means having a supply level threshold input, a probe input connected to said probe means, an output for producing a signal when said probe means contacts a supply voltage level test point, and a first AND gate connected to said output for producing a display signal to cause said display means to indicate a supply voltage level; second gate circuit means having a logic "1" threshold input, a probe input connected to said probe means, an output for producing a signal when said probe means contacts a logic "1" test point, and a second gate means for producing a display signal to cause said display means to indicate a logic "1" voltage; and additional gate means connected to said first gate circuit means output and to said second gate means to prevent said second gate means producing a display signal when both said first gate circuit means and said second gate circuit means produce output signals.

Claim 12

Test equipment for determining the logic state of a digital circuit comprising: electrically conductive probe means for contacting a circuit to determine the voltage or logic state of the circuit; display means for indicating that said probe means is contacting a supply voltage or a logic "1" test point; first gate circuit means having a supply level threshold input, a probe input connected to said probe means, an output for producing a signal when said probe means contacts a supply voltage level test point, and a first AND gate connected to said output for producing a display signal to cause said display means to indicate a supply voltage level; second gate circuit means having a logic "1" threshold input, a probe input connected to said probe means, an output for producing a signal when said probe means contacts a logic "1" test point, and a second gate means for producing a display signal to cause said display means to indicate a logic "1" voltage; and additional gate means connected to said first gate circuit means output and to said second gate means to prevent said second gate means producing a display signal when both said first gate circuit means and said second gate circuit means produce output signals.

Claim 13

Test equipment according to claim 9 including: circuit means to set the threshold input of said second gate circuit means for a logic "1" voltage level for TTL logic circuitry; additional circuit means to set said threshold input of said second gate circuit means for a different logic "1" voltage level for CMOS logic circuitry; and means for selecting either said circuit means or said additional circuit means to set the logic "1" voltage level of said second gate circuit means.

Claim 14

Test equipment for determining the logic state of a digital circuit comprising: electrically conductive probe means for contacting the point of a circuit to be tested; display means for indicating the logic state of the circuit test point and the occurrence of a train of pulses or a random pulse at the test point; monostable multivibrator means having an input connected to said probe means, and an output which remains in its astable state for a predetermined period of time after a test point voltage is applied to the input; circuit means connected to the output of said multivibrator means and to said display means, said circuit means including a first OR gate having a first input connected to the output of said multivibrator means, a second input, and an output connected to said display means; a second OR gate having a first input connected to the output of said first OR gate, an output connected to said second input of said first OR gate, and a second input; and switch means for selectively causing said second input of said second OR gate to be at a high voltage or at ground level, the arrangement being such that when said switch means causes said second input of said second OR gate to be at ground level a train of pulses at said probe means will cause the output of said first OR gate to trigger said display means to indicate said train of pulses and when said switch means causes said second input of said second OR gate to be at a high level a random pulse will cause the output of said first OR gate to trigger and lock said display means to record the passage of the random pulse.

Claim 15

Test equipment for determining the logic state of a digital circuit comprising: electrically conductive probe means for contacting the point of a circuit to be tested; display means for indicating the logic state of the circuit test point and the occurrence of a train of pulses or a random pulse at the test point; monostable multivibrator means having an input connected to said probe means, and an output which remains in its astable state for a predetermined period of time after a test point voltage is applied to the input; circuit means connected to the output of said multivibrator means and to said display means, said circuit means including a first OR gate having a first input connected to the output of said multivibrator means, a second input, and an output connected to said display means; a second OR gate having a first input connected to the output of said first OR gate, an output connected to said second input of said first OR gate, and a second input; and switch means for selectively causing said second input of said second OR gate to be at a high voltage or at ground level, the arrangement being such that when said switch means causes said second input of said second OR gate to be at ground level a train of pulses at said probe means will cause the output of said first OR gate to trigger said display means to indicate said train of pulses and when said switch means causes said second input of said second OR gate to be at a high level a random pulse will cause the output of said first OR gate to trigger and lock said display means to record the passage of the random pulse.

Claim 16

Test equipment according to claim 11 including: first AND gate means connected to said probe means and to said display means, said first AND gate means being enabled when said probe means contacts a logic "0" circuit test point to cause said display means to indicate a logic "0" voltage level; second AND gate means connected to said probe means and to said display means, said second AND gate means being enabled when said probe means contacts a logic "1" circuit test point to cause said display means to indicate a logic "1" voltage level; and means connecting the output of said first OR gate to said first and second AND gate means to disable said gate means when said first OR gate causes said display means to indicate a train of pulses or a random pulse.

Claim 17

Test equipment for determining the state of a digital circuit comprising: electrically conductive probe means for contacting a circuit to be tested; display means for indicating a logic "0" voltage level, a logic "1" voltage level, and a pulse condition; first gate means coupled to said probe means and to said display means, said gate means being operative to cause said display means to indicate a logic "0" voltage level when said probe means contacts a circuit at the logic "0" voltage level; second gate means coupled to said probe means and to said display means, said second gate means being operative to cause said display means to indicate a logic "1" voltage level when said probe means contacts a circuit at the logic "1" voltage level; and circuit means coupled to said probe means and to said display means, said circuit means being operative to cause said display means to indicate a pulse train or a random pulse when said probe means contacts a circuit at which a pulse train or a random pulse appears, said circuit means also being connected to said first and said second gate means so as to disable said gate means when said circuit means is operative.

Claim 18

Test equipment for determining the state of a digital circuit comprising: electrically conductive probe means for contacting a circuit to be tested; display means for indicating a logic "0" voltage level, a logic "1" voltage level, and a pulse condition; first gate means coupled to said probe means and to said display means, said gate means being operative to cause said display means to indicate a logic "0" voltage level when said probe means contacts a circuit at the logic "0" voltage level; second gate means coupled to said probe means and to said display means, said second gate means being operative to cause said display means to indicate a logic "1" voltage level when said probe means contacts a circuit at the logic "1" voltage level; and circuit means coupled to said probe means and to said display means, said circuit means being operative to cause said display means to indicate a pulse train or a random pulse when said probe means contacts a circuit at which a pulse train or a random pulse appears, said circuit means also being connected to said first and said second gate means so as to disable said gate means when said circuit means is operative.

Claim 19

Test equipment according to claim 13 wherein said display means is a seven segment LED display that indicates the logic state of a circuit by an alpha representation.

Claim 20

Test equipment according to claim 14 wherein the logic "0" state is represented by the letter "L", the logic "1" state is represented by the letter "H", and a pulse train or a random pulse is represented by the letter "P".