Patent US4598375A successfully refreshed from Google Patents.
US4598375A
Expired / Lapsed
US
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Time measuring circuit
Assignee: Hagiwara Electric Holdings Co Ltd
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Filing: 1983-04-22
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Granted: 1986-07-01
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Expires: 2003-04-22
Abstract
Abstract A time measuring circuit for meters of the pulse reflection type includes a gate signal generator for producing a gate pulse signal the duration of which is proportional to a value of an object to be measured, an oscillator for producing clock pulses at a predetermined frequency, a complementary-output element responsive to the gate pulse signal for producing first and second clock pulses which are the same at their phase and relatively inverted, a pair of gates for passing therethrough the first and second clock pulses during appearance of the gate pulse signal, a flip-flop for applying the first clock pulses to a counter and for applying the first and second clock pulses to a pair of integration circuits. The counter counts the first clock pulses to produce an output signal indicative of the counted value, and the integration circuits selectively integrate the first and second clock pulses in response to the gate pulse signal. An analog-to-digital converter is connected to the integration circuits to convert the finally integrated value into a digital value, and a computer is arranged to calculate a sum of the counted value and the digital value.
Inventors
- 👤 Tadao Hiramatsu
- 👤 Sunao Katayama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 12:13
CPC Classifications
G; G04; G04F; G04F10/00
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
233 words
A time measuring circuit for meters of the pulse reflection type including a pulse oscillator means for applying a transmission pulse signal to an object to be measured, a receiving amplifier for receiving an echo pulse signal reflected from said object, a gate signal generator connected to said oscillator means and said amplifier to receive the transmission pulse signal and the echo pulse signal so as to produce a gate pulse signal the duration of which is proportional to a time interval between the pulse signals to be measured, and measuring means for measuring the duration of the gate pulse signal; wherein the improvement comprises: first means for producing first and second output pulses at a predetermined frequency during appearance of the gate pulse signal; second means for counting the first output pulses from said first means and for producing an output signal indicative of the counted value; third means responsive to the first and second output pulses from said first means for converting the duration of the gate pulse signal into the corresponding voltage value; and fourth means for converting the finally converted voltage value into the corresponding digital value and for producing an output signal indicative of the digital value; and wherein said measuring means is arranged to measure a sum of the counted value and the digital value in response to the output signals from said second and fourth means.
Claim 2
Dependent Claim
233 words
A time measuring circuit for meters of the pulse reflection type including a pulse oscillator means for applying a transmission pulse signal to an object to be measured, a receiving amplifier for receiving an echo pulse signal reflected from said object, a gate signal generator connected to said oscillator means and said amplifier to receive the transmission pulse signal and the echo pulse signal so as to produce a gate pulse signal the duration of which is proportional to a time interval between the pulse signals to be measured, and measuring means for measuring the duration of the gate pulse signal; wherein the improvement comprises: first means for producing first and second output pulses at a predetermined frequency during appearance of the gate pulse signal; second means for counting the first output pulses from said first means and for producing an output signal indicative of the counted value; third means responsive to the first and second output pulses from said first means for converting the duration of the gate pulse signal into the corresponding voltage value; and fourth means for converting the finally converted voltage value into the corresponding digital value and for producing an output signal indicative of the digital value; and wherein said measuring means is arranged to measure a sum of the counted value and the digital value in response to the output signals from said second and fourth means.
Claim 3
Dependent Claim
110 words
A time measuring circuit as claimed in claim 1, wherein said first means comprises: an oscillator for producing clock pulses at a predetermined frequency; a complementary-output element responsive to the gate pulse signal from said gate signal generator for producing first and second clock pulses which are the same at their phase and relatively inverted; gate means responsive to the gate pulse signal from said gate signal generator for passing therethrough the first and second clock pulses during appearance of the gate pulse signal; and a flip-flop for applying the first clock pulses to said second means and for applying the first and second clock pulses to said third means.
Claim 4
Dependent Claim
97 words
A time measuring circuit as claimed in claim 2, wherein said complementary-output element is the form of a JK flip-flop connected to said oscillator to receive the clock pulses and responsive to the gate pulse signal from said gate signal generator to produce first and second clock pulses which are the same at their phase and relatively inverted, and said gate means includes a pair of NAND gates connected to said JK flip-flop to apply the first and second clock pulses to said first-named flip-flop in response to the gate pulse signal from said gate signal generator.
Claim 5
Dependent Claim
112 words
A time measuring circuit as claimed in claim 2, wherein said third means includes a voltage generator for generating positive and negative voltage signals which are the same at their voltage levels and different at their polarity, a selector means connected to said voltage generator for producing a positive voltage signal in response to the first clock pulses from said flip-flop and producing a negative voltage signal in response to the second clock pulses from said flip-flop, and an integration circuit connected to said selector means to charge in response to the positive voltage signal from said selector means and discharge in response to the negative voltage signal from said selector means.
Claim 6
Dependent Claim
95 words
A time measuring circuit as claimed in claim 2, wherein said second means is in the form of a counter connected to said flip-flop to count the first clock pulses, said third means is in the form of a pair of integration circuits connected to said flip-flop to selectively integrate the first and second clock pulses in response to the gate pulse signal from said gate signal generator, and said fourth means is in the form of an analog-to-digital converter connected to said integration circuits to convert the finally integrated value into a digital value.
Claim 7
Dependent Claim
42 words
A time measuring circuit as claimed in claim 5, wherein said measuring means is in the form of a microcomputer arranged to calculate a sum of the counted value of the first clock pulses and the digital value from said analog-to-digital converter.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-06-30 | 1989-12-30 | 1990-07-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-06-30 | 1993-12-30 | 1994-07-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-06-30 | 1997-12-30 | 1998-07-01 | $7700.00 | Window Closed / Lapsed |