US4597041A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for enhancing the operation of a data processing system
Assignee: EMC Corp
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Filing: 1982-11-15
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Granted: 1986-06-24
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Expires: 2002-11-15
Abstract
Abstract A data processing system having separate kernel, vertical and horizontal microcode, separate loading of vertical microcode and a permanently resident kernel microcode, and a soft console with dual levels of capability. The system includes a processor having dual ALC and microcode processors, and an instruction processor. Also included are a processor incorporating a multifunction processor memory, a malfunction nibble shifter, and a high speed look-aside memory control.
Inventors
- 👤 James M. Guyer
- 👤 David I. Epstein
- 👤 David L. Keating
- 👤 Walker Anderson
- 👤 James E. Veres
- 👤 Harold R. Kimmens
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 11:38
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/30145; G06F12/00; G06F12/02; G06F12/08; G06F12/10; G06F12/1027; G06F9/22; G06F9/226; G06F9/24; G06F9/26; G06F9/262; G06F9/268; G06F2212/00; G06F2212/25; G06F2212/251; G06F2212/2515
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
261 words
In a data processing sytem including: processor means for processing said data; memory means for storing said data and for storing instructions for directing operations of said system; but means for conducting said data and instructions between said memory means and said processor means; external terminal means for providing commands for directing said operation of said system; external memory means; I/O means connected between said terminal means, said external memory means and said bus means for conducting said commands and data between said terminal means, said external memory means and said bus means; and microcode control means for providng sequences of microinstructions for controlling said operation of said system, comprising: kernel microcode memory means responsive to first certain of said instructions and commands for storing and providing to said system corresponding first certain of said microinstruction sequences for controlling iirst certain oi said operations; and writable microcode memory means responsive to second certain of said instructions and commands for storing and providing to said system corresponding second certain of microinstruction sequences for controlling second certain of said operations, said external memory means being used at least for storing one or more versions of said second certain of said microinstruction sequences, said first certain of said microinstruction sequences including microinstruction sequences for: (a) controlling said system to read one certain version of said second certain of said microinstruction sequences from said external memory means to memory means; and (b) to read said certain version of said second certain of said microinstruction sequences from said memory means to said writable microcode memory means.
Claim 2
Dependent Claim
261 words
In a data processing sytem including: processor means for processing said data; memory means for storing said data and for storing instructions for directing operations of said system; but means for conducting said data and instructions between said memory means and said processor means; external terminal means for providing commands for directing said operation of said system; external memory means; I/O means connected between said terminal means, said external memory means and said bus means for conducting said commands and data between said terminal means, said external memory means and said bus means; and microcode control means for providng sequences of microinstructions for controlling said operation of said system, comprising: kernel microcode memory means responsive to first certain of said instructions and commands for storing and providing to said system corresponding first certain of said microinstruction sequences for controlling iirst certain oi said operations; and writable microcode memory means responsive to second certain of said instructions and commands for storing and providing to said system corresponding second certain of microinstruction sequences for controlling second certain of said operations, said external memory means being used at least for storing one or more versions of said second certain of said microinstruction sequences, said first certain of said microinstruction sequences including microinstruction sequences for: (a) controlling said system to read one certain version of said second certain of said microinstruction sequences from said external memory means to memory means; and (b) to read said certain version of said second certain of said microinstruction sequences from said memory means to said writable microcode memory means.
Claim 3
Dependent Claim
93 words
The microcode control means of claim 1, wherein said first certain of said instructions comprise an instruction set for an eight bit data processing system and said first certain of said microinstruction sequences allow said system to operate as said eight bit data processing system; and said second certain of said instructions comprise a second set of instructions comprising an extension of said first certain of said instructions, and wherein said second certain of said instructions and said microinstruction sequences allow said system to operate as a sixteen and thirty-two bit instruction set.
Claim 4
Dependent Claim
29 words
The microcode control means of claim 1, wherein said first certain of said commands comprise single character commands, and said second certain of said commands comprise multiple character commands.
Claim 5
Dependent Claim
19 words
The microcode control means of claim 1, wherein said first certain of said commands include a system reset command.
Claim 6
Independent Claim
176 words
A method of enhancing the operation of a data processing system, the data processing system including: memory means for storing said data and for storing instructions for directing operations of said system; external memory means; and microcode control means for providing sequences of microinstructions for controlling said operation of said system, comprising: kernel microcode memory means responsive to first certain of said instructions and commands for storing and providing to said system corresponding first certain of said microinstruction sequences for controlling first certain of said operations; and writable microcode memory means responsive to second certain of said instructions and commands for storing and providing to said system corresponding second certain of microinstruction sequences for controlling second certain of said operations, and the method comprising the steps of: initially loading the writable microcode memory means with initial versions of the second certain microinstruction sequences from the external memory means; in response to the first certain microinstruction sequences, loading the writable microcode memory means with alternate versions of the second certain microinstruction sequences from the external memory means.
Claim 7
Independent Claim
176 words
A method of enhancing the operation of a data processing system, the data processing system including: memory means for storing said data and for storing instructions for directing operations of said system; external memory means; and microcode control means for providing sequences of microinstructions for controlling said operation of said system, comprising: kernel microcode memory means responsive to first certain of said instructions and commands for storing and providing to said system corresponding first certain of said microinstruction sequences for controlling first certain of said operations; and writable microcode memory means responsive to second certain of said instructions and commands for storing and providing to said system corresponding second certain of microinstruction sequences for controlling second certain of said operations, and the method comprising the steps of: initially loading the writable microcode memory means with initial versions of the second certain microinstruction sequences from the external memory means; in response to the first certain microinstruction sequences, loading the writable microcode memory means with alternate versions of the second certain microinstruction sequences from the external memory means.
Claim 8
Dependent Claim
96 words
The method of claim 5, wherein in the data processing system: said first certain of said instructions comprise an instruction set for an eight bit data processing system and said first certain of said microinstruction sequences allow said system to operate as said eight bit data processing system; and said second certain of said instructions comprise a second set of instructions comprising an extension of said first certain of said instructions, and wherein said second certain of said instructions and said microinstruction sequences allow said system to operate as a sixteen and thirty-two bit instruction set.
Claim 9
Dependent Claim
31 words
The method of claim 5, wherein in the data processing system: said first certain of said commands comprise single character commands, and said second set of commands comprise multiple character commands.
Claim 10
Dependent Claim
22 words
The method of claim 5, wherein in the data processing system said first certain of said commands include a system reset command.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-06-23 | 1989-12-23 | 1990-06-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-06-23 | 1993-12-23 | 1994-06-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-06-23 | 1997-12-23 | 1998-06-24 | $7700.00 | Window Closed / Lapsed |